summaryrefslogtreecommitdiffstats
path: root/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
diff options
context:
space:
mode:
authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2008-01-06 19:28:07 +0000
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2008-01-06 19:28:07 +0000
commit90fba37c49479ed4e5233dc0d348cdf7d24c9ee1 (patch)
tree58af9e3b3204308a2b7853127331f4d693e1b744 /target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
parentb59f896089edf83ce4cd1951001b6cc889bdd287 (diff)
update brcm-2.4 to 2.4.35.4, integrate new broadcom system code, update broadcom-wl to a contributed version (v4.150.10.5) - no bcm57xx support yet, will follow shortly
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10137 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c')
-rw-r--r--target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c22
1 files changed, 20 insertions, 2 deletions
diff --git a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
index 8c8f6aab5..2d8549623 100644
--- a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
+++ b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
@@ -25,7 +25,6 @@
#include <typedefs.h>
#include <osl.h>
-#include <bcmutils.h>
#include <sbconfig.h>
#include <sbutils.h>
#include <hndpci.h>
@@ -134,7 +133,7 @@ pcibios_init(void)
{
ulong flags;
- if (!(sbh = sb_kattach()))
+ if (!(sbh = sb_kattach(SB_OSH)))
panic("sb_kattach failed");
spin_lock_init(&sbh_lock);
@@ -312,6 +311,25 @@ pcibios_enable_device(struct pci_dev *dev, int mask)
writel(0x7FF, (ulong)regs + 0x200);
udelay(1);
}
+ /* PRxxxx: War for 5354 failures. */
+ if (sb_corerev(sbh) == 1) {
+ uint32 tmp;
+
+ /* Change Flush control reg */
+ tmp = readl((uintptr)regs + 0x400);
+ tmp &= ~8;
+ writel(tmp, (uintptr)regs + 0x400);
+ tmp = readl((uintptr)regs + 0x400);
+ printk("USB20H fcr: 0x%x\n", tmp);
+
+ /* Change Shim control reg */
+ tmp = readl((uintptr)regs + 0x304);
+ tmp &= ~0x100;
+ writel(tmp, (uintptr)regs + 0x304);
+ tmp = readl((uintptr)regs + 0x304);
+ printk("USB20H shim cr: 0x%x\n", tmp);
+ }
+
} else
sb_core_reset(sbh, 0, 0);