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authorhcg <hcg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-04-04 14:33:52 +0000
committerhcg <hcg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-04-04 14:33:52 +0000
commitc3831d028457ff1c106fa9a89e3b07712255d838 (patch)
treee8e9381e46fc6e4c50b98f819446338e6bf3e4a6 /target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch
parent7b54053908fcad636059945ea8b978578d631885 (diff)
Cleanups on romboot and u-boot.
Conditionally apply ldd and ldconfig support on at91 platform git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6862 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch')
-rw-r--r--target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch100
1 files changed, 50 insertions, 50 deletions
diff --git a/target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch b/target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch
index 5a08d57be..7c2857285 100644
--- a/target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch
+++ b/target/linux/at91-2.6/image/romboot/patches/000-fixenv.patch
@@ -2,56 +2,56 @@ diff -uNr romboot/main.cpp romboot.new/main.cpp
--- romboot/main.cpp 2004-07-16 17:10:04.000000000 +0200
+++ romboot.new/main.cpp 2006-03-03 02:27:37.000000000 +0100
@@ -23,12 +23,12 @@
- #define AT91C_UBOOT_DATAFLASH_ADDR 0xC0008000
-
- // crystal= 18.432MHz
--//#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz
--//#define AT91C_PLLA_MCK 0x0000202
-+#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz
-+#define AT91C_PLLA_MCK 0x0000202
-
- // crystal= 20.000MHz
--#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz
--#define AT91C_PLLA_MCK 0x0000202
-+//#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz
-+//#define AT91C_PLLA_MCK 0x0000202
-
- #define DELAY_MAIN_FREQ 1000
- #define DISP_LINE_LEN 16
+ #define AT91C_UBOOT_DATAFLASH_ADDR 0xC0008000
+
+ // crystal= 18.432MHz
+-//#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz
+-//#define AT91C_PLLA_MCK 0x0000202
++#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz
++#define AT91C_PLLA_MCK 0x0000202
+
+ // crystal= 20.000MHz
+-#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz
+-#define AT91C_PLLA_MCK 0x0000202
++//#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz
++//#define AT91C_PLLA_MCK 0x0000202
+
+ #define DELAY_MAIN_FREQ 1000
+ #define DISP_LINE_LEN 16
@@ -151,7 +151,7 @@
- //*-----------------------------------------------------------------------------
- void AT91F_DisplayMenu(void)
- {
-- printf("\n\rATMEL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__);
-+ printf("\n\rFDL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__);
- printf(menu_separ);
- AT91F_DataflashPrintInfo();
- printf(menu_separ);
+ //*-----------------------------------------------------------------------------
+ void AT91F_DisplayMenu(void)
+ {
+- printf("\n\rATMEL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__);
++ printf("\n\rFDL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__);
+ printf(menu_separ);
+ AT91F_DataflashPrintInfo();
+ printf(menu_separ);
@@ -306,6 +306,19 @@
- AT91F_SetPLL();
- }
-
-+void LedCode(void)
-+{
-+ int *pRegister;
-+ pRegister = (int *)0xFFFFF800; // Enable port C peripheral reg
-+ *pRegister = 0x3c00;
-+ pRegister = (int *)0xFFFFF810; // Output Enable reg
-+ *pRegister = 0x3c00;
-+ pRegister = (int *)0xFFFFF830; // Set data
-+ *pRegister = 0x1400;
-+ pRegister = (int *)0xFFFFF834; // Clear bits
-+ *pRegister = 0x2800;
-+}
-+
- void AT91F_StartUboot(unsigned int dummy, void *pvoid)
- {
- printf("Load U-BOOT from dataflash[%x] to SDRAM[%x]\n\r", AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_ADDR);
+ AT91F_SetPLL();
+ }
+
++void LedCode(void)
++{
++ int *pRegister;
++ pRegister = (int *)0xFFFFF800; // Enable port C peripheral reg
++ *pRegister = 0x3c00;
++ pRegister = (int *)0xFFFFF810; // Output Enable reg
++ *pRegister = 0x3c00;
++ pRegister = (int *)0xFFFFF830; // Set data
++ *pRegister = 0x1400;
++ pRegister = (int *)0xFFFFF834; // Clear bits
++ *pRegister = 0x2800;
++}
++
+ void AT91F_StartUboot(unsigned int dummy, void *pvoid)
+ {
+ printf("Load U-BOOT from dataflash[%x] to SDRAM[%x]\n\r", AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_ADDR);
@@ -313,6 +326,7 @@
- printf("Set PLLA to 180Mhz and Master clock to 60Mhz and start U-BOOT\n\r");
- //* Reset registers
- AT91F_ResetRegisters();
-+ LedCode();
- Jump(AT91C_UBOOT_ADDR);
- while(1);
- }
+ printf("Set PLLA to 180Mhz and Master clock to 60Mhz and start U-BOOT\n\r");
+ //* Reset registers
+ AT91F_ResetRegisters();
++ LedCode();
+ Jump(AT91C_UBOOT_ADDR);
+ while(1);
+ }