diff options
author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-01-22 22:38:19 +0000 |
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committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-01-22 22:38:19 +0000 |
commit | e0b80e41eb0b24e76285b9355725d2f4f66ada50 (patch) | |
tree | dccbb34ba7bd86e0b13abd8226004f09f5766847 /target/linux/ar71xx/patches-3.2/027-watchdog-ath79_wdt-flush-register-writes.patch | |
parent | 22b99f32a13348502bc0f33b93b70565e941d99c (diff) |
ar71xx: add initial support for 3.2
Tested on the following boards:
ALFA AP96
TL-MR3220 v1
TL-WR1043ND v1
TL-WR2543ND v1
TL-WR703N v1
TL-WR741ND v1
TL-WR741ND v4
WNDR3700 v1
WZR-HP-G300NH
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29868 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.2/027-watchdog-ath79_wdt-flush-register-writes.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.2/027-watchdog-ath79_wdt-flush-register-writes.patch | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.2/027-watchdog-ath79_wdt-flush-register-writes.patch b/target/linux/ar71xx/patches-3.2/027-watchdog-ath79_wdt-flush-register-writes.patch new file mode 100644 index 000000000..32d39448a --- /dev/null +++ b/target/linux/ar71xx/patches-3.2/027-watchdog-ath79_wdt-flush-register-writes.patch @@ -0,0 +1,43 @@ +From 156560a512a39284148d556ab96e2e833e816666 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Fri, 23 Dec 2011 19:25:42 +0100 +Subject: [PATCH 27/27] watchdog: ath79_wdt: flush register writes + +The watchdog register writes required to have a flush +in order to commit the values to the register. Without +the flush, the driver not function correctly on AR934X +SoCs. + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> +Signed-off-by: Wim Van Sebroeck <wim@iguana.be> +--- + drivers/watchdog/ath79_wdt.c | 6 ++++++ + 1 files changed, 6 insertions(+), 0 deletions(-) + +--- a/drivers/watchdog/ath79_wdt.c ++++ b/drivers/watchdog/ath79_wdt.c +@@ -68,17 +68,23 @@ static int max_timeout; + static inline void ath79_wdt_keepalive(void) + { + ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout); ++ /* flush write */ ++ ath79_reset_rr(AR71XX_RESET_REG_WDOG); + } + + static inline void ath79_wdt_enable(void) + { + ath79_wdt_keepalive(); + ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR); ++ /* flush write */ ++ ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL); + } + + static inline void ath79_wdt_disable(void) + { + ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE); ++ /* flush write */ ++ ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL); + } + + static int ath79_wdt_set_timeout(int val) |