diff options
| author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-01-22 22:38:11 +0000 |
|---|---|---|
| committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-01-22 22:38:11 +0000 |
| commit | 22b99f32a13348502bc0f33b93b70565e941d99c (patch) | |
| tree | f60488ea3f321808d90711807b8a352e1f476b03 /target/linux/ar71xx/files/arch | |
| parent | b66dee35c331cdcfc0ac2e61699abe1e9191e8d0 (diff) | |
ar71xx: move arch specific files to files-2.6.39
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29867 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch')
104 files changed, 0 insertions, 15552 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/Kconfig b/target/linux/ar71xx/files/arch/mips/ar71xx/Kconfig deleted file mode 100644 index c22cd4abe..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/Kconfig +++ /dev/null @@ -1,492 +0,0 @@ -if ATHEROS_AR71XX - -menu "Atheros AR71xx machine selection" -config AR71XX_MACH_ALFA_AP96 - bool "ALFA Network AP96 board support" - select SOC_AR71XX - select AR71XX_DEV_PB42_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_USB - -config AR71XX_MACH_HORNET_UB - bool "Alfa Networks Hornet-UB board support" - select SOC_AR933X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - select AR71XX_DEV_AR9XXX_WMAC - -config AR71XX_MACH_ALFA_NX - bool "ALFA Network N2/N5 board support" - select SOC_AR724X - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_ALL0258N - bool "Allnet ALL0258N support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_AP81 - bool "Atheros AP81 board support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_AP83 - bool "Atheros AP83 board support" - select SOC_AR913X - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_AP96 - bool "Atheros AP96 board support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP94_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_AP121 - bool "Atheros AP121 board support" - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - select AR71XX_DEV_AR9XXX_WMAC - select SOC_AR933X - -config AR71XX_MACH_DB120 - bool "Atheros DB120 board support" - select SOC_AR934X - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_DB120_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_DIR_600_A1 - bool "D-Link DIR-600 rev. A1 support" - select SOC_AR724X - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_NVRAM - -config AR71XX_MACH_DIR_615_C1 - bool "D-Link DIR-615 rev. C1 support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_NVRAM - -config AR71XX_MACH_DIR_825_B1 - bool "D-Link DIR-825 rev. B1 board support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP94_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_JA76PF - bool "jjPlus JA76PF board support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_PB42_PCI if PCI - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_JWAP003 - bool "jjPlus JWAP003 board support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_PB42_PCI if PCI - select AR71XX_DEV_USB - -config AR71XX_MACH_PB42 - bool "Atheros PB42 board support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_PB42_PCI if PCI - -config AR71XX_MACH_PB44 - bool "Atheros PB44 board support" - select SOC_AR71XX - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_PB42_PCI if PCI - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_PB92 - bool "Atheros PB92 board support" - select SOC_AR724X - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_PB9X_PCI if PCI - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_RW2458N - bool "Redwave RW2458N board support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_AW_NR580 - bool "AzureWave AW-NR580 board support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_PB42_PCI if PCI - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_WZR_HP_AG300H - bool "Buffalo WZR-HP-AG300H board support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_WZR_HP_G450H - bool "Buffalo WZR-HP-G450H board support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_WZR_HP_G300NH - bool "Buffalo WZR-HP-G300NH board support" - select SOC_AR913X - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - select RTL8366_SMI - -config AR71XX_MACH_WZR_HP_G300NH2 - bool "Buffalo WZR-HP-G300NH2 board support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_WHR_HP_G300N - bool "Buffalo WHR-HP-G300N board support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_WP543 - bool "Compex WP543/WPJ543 board support" - select SOC_AR71XX - select MYLOADER - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_PB42_PCI if PCI - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_WRT160NL - bool "Linksys WRT160NL board support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - select AR71XX_NVRAM - -config AR71XX_MACH_WRT400N - bool "Linksys WRT400N board support" - select SOC_AR71XX - select AR71XX_DEV_AP94_PCI if PCI - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_RB4XX - bool "MikroTik RouterBOARD 4xx series support" - select SOC_AR71XX - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_RB750 - bool "MikroTik RouterBOARD 750 support" - select SOC_AR724X - -config AR71XX_MACH_WNDR3700 - bool "NETGEAR WNDR3700 board support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP94_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_WNR2000 - bool "NETGEAR WNR2000 board support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_OM2P - bool "OpenMesh OM2P board support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_MZK_W04NU - bool "Planex MZK-W04NU board support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_MZK_W300NH - bool "Planex MZK-W300NH board support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_NBG460N - bool "Zyxel NBG460N/550N/550NH board support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_TL_MR3020 - bool "TP-LINK TL-MR3020 support" - select SOC_AR933X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - select AR71XX_DEV_AR9XXX_WMAC - -config AR71XX_MACH_TL_MR3X20 - bool "TP-LINK TL-MR3220/3420 support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_TL_WA901ND - bool "TP-LINK TL-WA901ND support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_TL_WA901ND_V2 - bool "TP-LINK TL-WA901ND v2 support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_TL_WR703N - bool "TP-LINK TL-WR703N support" - select SOC_AR933X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - select AR71XX_DEV_AR9XXX_WMAC - -config AR71XX_MACH_TL_WR741ND - bool "TP-LINK TL-WR741ND support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_TL_WR741ND_V4 - bool "TP-LINK TL-WR741ND v4 support" - select SOC_AR933X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_AR9XXX_WMAC - -config AR71XX_MACH_TL_WR841N_V1 - bool "TP-LINK TL-WR841N v1 support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_PB42_PCI if PCI - select AR71XX_DEV_DSA - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_TL_WR941ND - bool "TP-LINK TL-WR941ND support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_DSA - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_TL_WR1043ND - bool "TP-LINK TL-WR1043ND support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_TL_WR2543N - bool "TP-LINK TL-WR2543N/ND support" - select SOC_AR724X - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_USB - -config AR71XX_MACH_TEW_632BRP - bool "TRENDnet TEW-632BRP support" - select SOC_AR913X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AR9XXX_WMAC - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_NVRAM - -config AR71XX_MACH_UBNT - bool "Ubiquiti AR71xx based boards support" - select SOC_AR71XX - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - select AR71XX_DEV_PB42_PCI if PCI - select AR71XX_DEV_USB - -config AR71XX_MACH_EAP7660D - bool "Senao EAP7660D support" - select SOC_AR71XX - select AR71XX_DEV_M25P80 - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -config AR71XX_MACH_ZCN_1523H - bool "Zcomax ZCN-1523H support" - select SOC_AR724X - select AR71XX_DEV_M25P80 - select AR71XX_DEV_AP91_PCI if PCI - select AR71XX_DEV_GPIO_BUTTONS - select AR71XX_DEV_LEDS_GPIO - -endmenu - -config SOC_AR71XX - bool - select USB_ARCH_HAS_EHCI - select USB_ARCH_HAS_OHCI - -config SOC_AR724X - bool - select USB_ARCH_HAS_EHCI - select USB_ARCH_HAS_OHCI - -config SOC_AR913X - bool - select USB_ARCH_HAS_EHCI - -config SOC_AR934X - bool - select USB_ARCH_HAS_EHCI - -config AR71XX_DEV_M25P80 - def_bool n - -config AR71XX_DEV_AP91_PCI - select AR71XX_PCI_ATH9K_FIXUP - def_bool n - -config AR71XX_DEV_AP94_PCI - select AR71XX_PCI_ATH9K_FIXUP - def_bool n - -config AR71XX_DEV_AR9XXX_WMAC - def_bool n - -config AR71XX_DEV_DB120_PCI - select AR71XX_PCI_ATH9K_FIXUP - def_bool n - -config AR71XX_DEV_DSA - def_bool n - -config AR71XX_DEV_GPIO_BUTTONS - def_bool n - -config AR71XX_DEV_LEDS_GPIO - def_bool n - -config AR71XX_DEV_PB42_PCI - def_bool n - -config AR71XX_DEV_PB9X_PCI - def_bool n - -config AR71XX_DEV_USB - def_bool n - -config AR71XX_NVRAM - def_bool n - -config AR71XX_PCI_ATH9K_FIXUP - def_bool n - -config SOC_AR933X - bool - select USB_ARCH_HAS_EHCI - -endif diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/Makefile b/target/linux/ar71xx/files/arch/mips/ar71xx/Makefile deleted file mode 100644 index ba12234ea..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/Makefile +++ /dev/null @@ -1,80 +0,0 @@ -# -# Makefile for the Atheros AR71xx SoC specific parts of the kernel -# -# Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> -# Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> -# -# This program is free software; you can redistribute it and/or modify it -# under the terms of the GNU General Public License version 2 as published -# by the Free Software Foundation. - -obj-y := prom.o irq.o setup.o devices.o gpio.o ar71xx.o - -obj-$(CONFIG_EARLY_PRINTK) += early_printk.o -obj-$(CONFIG_PCI) += pci.o - -obj-$(CONFIG_AR71XX_DEV_AP91_PCI) += dev-ap91-pci.o -obj-$(CONFIG_AR71XX_DEV_AP94_PCI) += dev-ap94-pci.o -obj-$(CONFIG_AR71XX_DEV_AR9XXX_WMAC) += dev-ar9xxx-wmac.o -obj-$(CONFIG_AR71XX_DEV_DB120_PCI) += dev-db120-pci.o -obj-$(CONFIG_AR71XX_DEV_DSA) += dev-dsa.o -obj-$(CONFIG_AR71XX_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o -obj-$(CONFIG_AR71XX_DEV_LEDS_GPIO) += dev-leds-gpio.o -obj-$(CONFIG_AR71XX_DEV_M25P80) += dev-m25p80.o -obj-$(CONFIG_AR71XX_DEV_PB42_PCI) += dev-pb42-pci.o -obj-$(CONFIG_AR71XX_DEV_PB9X_PCI) += dev-pb9x-pci.o -obj-$(CONFIG_AR71XX_DEV_USB) += dev-usb.o - -obj-$(CONFIG_AR71XX_NVRAM) += nvram.o -obj-$(CONFIG_AR71XX_PCI_ATH9K_FIXUP) += pci-ath9k-fixup.o - -obj-$(CONFIG_AR71XX_MACH_ALFA_AP96) += mach-alfa-ap96.o -obj-$(CONFIG_AR71XX_MACH_ALFA_NX) += mach-alfa-nx.o -obj-$(CONFIG_AR71XX_MACH_ALL0258N) += mach-all0258n.o -obj-$(CONFIG_AR71XX_MACH_AP121) += mach-ap121.o -obj-$(CONFIG_AR71XX_MACH_AP81) += mach-ap81.o -obj-$(CONFIG_AR71XX_MACH_AP83) += mach-ap83.o -obj-$(CONFIG_AR71XX_MACH_AP96) += mach-ap96.o -obj-$(CONFIG_AR71XX_MACH_AW_NR580) += mach-aw-nr580.o -obj-$(CONFIG_AR71XX_MACH_DB120) += mach-db120.o -obj-$(CONFIG_AR71XX_MACH_DIR_600_A1) += mach-dir-600-a1.o -obj-$(CONFIG_AR71XX_MACH_DIR_615_C1) += mach-dir-615-c1.o -obj-$(CONFIG_AR71XX_MACH_DIR_825_B1) += mach-dir-825-b1.o -obj-$(CONFIG_AR71XX_MACH_EAP7660D) += mach-eap7660d.o -obj-$(CONFIG_AR71XX_MACH_JA76PF) += mach-ja76pf.o -obj-$(CONFIG_AR71XX_MACH_JWAP003) += mach-jwap003.o -obj-$(CONFIG_AR71XX_MACH_HORNET_UB) += mach-hornet-ub.o -obj-$(CONFIG_AR71XX_MACH_MZK_W04NU) += mach-mzk-w04nu.o -obj-$(CONFIG_AR71XX_MACH_MZK_W300NH) += mach-mzk-w300nh.o -obj-$(CONFIG_AR71XX_MACH_NBG460N) += mach-nbg460n.o -obj-$(CONFIG_AR71XX_MACH_OM2P) += mach-om2p.o -obj-$(CONFIG_AR71XX_MACH_PB42) += mach-pb42.o -obj-$(CONFIG_AR71XX_MACH_PB44) += mach-pb44.o -obj-$(CONFIG_AR71XX_MACH_PB92) += mach-pb92.o -obj-$(CONFIG_AR71XX_MACH_RB4XX) += mach-rb4xx.o -obj-$(CONFIG_AR71XX_MACH_RB750) += mach-rb750.o -obj-$(CONFIG_AR71XX_MACH_RW2458N) += mach-rw2458n.o -obj-$(CONFIG_AR71XX_MACH_TEW_632BRP) += mach-tew-632brp.o -obj-$(CONFIG_AR71XX_MACH_TL_MR3020) += mach-tl-mr3020.o -obj-$(CONFIG_AR71XX_MACH_TL_MR3X20) += mach-tl-mr3x20.o -obj-$(CONFIG_AR71XX_MACH_TL_WA901ND) += mach-tl-wa901nd.o -obj-$(CONFIG_AR71XX_MACH_TL_WA901ND_V2) += mach-tl-wa901nd-v2.o -obj-$(CONFIG_AR71XX_MACH_TL_WR741ND) += mach-tl-wr741nd.o -obj-$(CONFIG_AR71XX_MACH_TL_WR741ND_V4) += mach-tl-wr741nd-v4.o -obj-$(CONFIG_AR71XX_MACH_TL_WR841N_V1) += mach-tl-wr841n.o -obj-$(CONFIG_AR71XX_MACH_TL_WR941ND) += mach-tl-wr941nd.o -obj-$(CONFIG_AR71XX_MACH_TL_WR1043ND) += mach-tl-wr1043nd.o -obj-$(CONFIG_AR71XX_MACH_TL_WR2543N) += mach-tl-wr2543n.o -obj-$(CONFIG_AR71XX_MACH_TL_WR703N) += mach-tl-wr703n.o -obj-$(CONFIG_AR71XX_MACH_UBNT) += mach-ubnt.o -obj-$(CONFIG_AR71XX_MACH_WHR_HP_G300N) += mach-whr-hp-g300n.o -obj-$(CONFIG_AR71XX_MACH_WNDR3700) += mach-wndr3700.o -obj-$(CONFIG_AR71XX_MACH_WNR2000) += mach-wnr2000.o -obj-$(CONFIG_AR71XX_MACH_WP543) += mach-wp543.o -obj-$(CONFIG_AR71XX_MACH_WRT160NL) += mach-wrt160nl.o -obj-$(CONFIG_AR71XX_MACH_WRT400N) += mach-wrt400n.o -obj-$(CONFIG_AR71XX_MACH_WZR_HP_G300NH) += mach-wzr-hp-g300nh.o -obj-$(CONFIG_AR71XX_MACH_WZR_HP_G300NH2) += mach-wzr-hp-g300nh2.o -obj-$(CONFIG_AR71XX_MACH_WZR_HP_AG300H) += mach-wzr-hp-ag300h.o -obj-$(CONFIG_AR71XX_MACH_WZR_HP_G450H) += mach-wzr-hp-g450h.o -obj-$(CONFIG_AR71XX_MACH_ZCN_1523H) += mach-zcn-1523h.o diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c b/target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c deleted file mode 100644 index 93cbe5331..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c +++ /dev/null @@ -1,278 +0,0 @@ -/* - * AR71xx SoC routines - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/mutex.h> -#include <linux/spinlock.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -static DEFINE_MUTEX(ar71xx_flash_mutex); -static DEFINE_SPINLOCK(ar71xx_device_lock); - -void __iomem *ar71xx_ddr_base; -EXPORT_SYMBOL_GPL(ar71xx_ddr_base); - -void __iomem *ar71xx_pll_base; -EXPORT_SYMBOL_GPL(ar71xx_pll_base); - -void __iomem *ar71xx_reset_base; -EXPORT_SYMBOL_GPL(ar71xx_reset_base); - -void __iomem *ar71xx_gpio_base; -EXPORT_SYMBOL_GPL(ar71xx_gpio_base); - -void __iomem *ar71xx_usb_ctrl_base; -EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base); - -void ar71xx_device_stop(u32 mask) -{ - unsigned long flags; - u32 mask_inv; - u32 t; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE); - ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | mask); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240; - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE); - t |= mask; - t &= ~mask_inv; - ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE); - ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t | mask); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE); - ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t | mask); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE); - ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t | mask); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - default: - BUG(); - } -} -EXPORT_SYMBOL_GPL(ar71xx_device_stop); - -void ar71xx_device_start(u32 mask) -{ - unsigned long flags; - u32 mask_inv; - u32 t; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE); - ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t & ~mask); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240; - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE); - t &= ~mask; - t |= mask_inv; - ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE); - ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t & ~mask); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE); - ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t & ~mask); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE); - ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t & ~mask); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - default: - BUG(); - } -} -EXPORT_SYMBOL_GPL(ar71xx_device_start); - -void ar71xx_device_reset_rmw(u32 clear, u32 set) -{ - unsigned long flags; - unsigned int reg; - u32 t; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - reg = AR71XX_RESET_REG_RESET_MODULE; - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - reg = AR724X_RESET_REG_RESET_MODULE; - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - reg = AR91XX_RESET_REG_RESET_MODULE; - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - reg = AR933X_RESET_REG_RESET_MODULE; - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - reg = AR934X_RESET_REG_RESET_MODULE; - break; - - default: - BUG(); - } - - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(reg); - t &= ~clear; - t |= set; - ar71xx_reset_wr(reg, t); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); -} -EXPORT_SYMBOL_GPL(ar71xx_device_reset_rmw); - -int ar71xx_device_stopped(u32 mask) -{ - unsigned long flags; - u32 t; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - spin_lock_irqsave(&ar71xx_device_lock, flags); - t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE); - spin_unlock_irqrestore(&ar71xx_device_lock, flags); - break; - - default: - BUG(); - } - - return ((t & mask) == mask); -} -EXPORT_SYMBOL_GPL(ar71xx_device_stopped); - -void ar71xx_ddr_flush(u32 reg) -{ - ar71xx_ddr_wr(reg, 1); - while ((ar71xx_ddr_rr(reg) & 0x1)) - ; - - ar71xx_ddr_wr(reg, 1); - while ((ar71xx_ddr_rr(reg) & 0x1)) - ; -} -EXPORT_SYMBOL_GPL(ar71xx_ddr_flush); - -void ar71xx_flash_acquire(void) -{ - mutex_lock(&ar71xx_flash_mutex); -} -EXPORT_SYMBOL_GPL(ar71xx_flash_acquire); - -void ar71xx_flash_release(void) -{ - mutex_unlock(&ar71xx_flash_mutex); -} -EXPORT_SYMBOL_GPL(ar71xx_flash_release); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap91-pci.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap91-pci.c deleted file mode 100644 index 7cd8c6594..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap91-pci.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Atheros AP91 reference board PCI initialization - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/ath9k_platform.h> -#include <linux/delay.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -#include "dev-ap91-pci.h" -#include "pci-ath9k-fixup.h" - -static struct ath9k_platform_data ap91_wmac_data = { - .led_pin = -1, -}; -static char ap91_wmac_mac[6]; - -static struct ar71xx_pci_irq ap91_pci_irqs[] __initdata = { - { - .slot = 0, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV0, - } -}; - -static int ap91_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 0: - dev->dev.platform_data = &ap91_wmac_data; - break; - } - - return 0; -} - -__init void ap91_pci_setup_wmac_leds(struct gpio_led *leds, int num_leds) -{ - ap91_wmac_data.leds = leds; - ap91_wmac_data.num_leds = num_leds; -} - -__init void ap91_pci_setup_wmac_led_pin(int pin) -{ - ap91_wmac_data.led_pin = pin; -} - -__init void ap91_pci_setup_wmac_gpio(u32 mask, u32 val) -{ - ap91_wmac_data.gpio_mask = mask; - ap91_wmac_data.gpio_val = val; -} - -void __init ap91_pci_init(u8 *cal_data, u8 *mac_addr) -{ - if (cal_data) - memcpy(ap91_wmac_data.eeprom_data, cal_data, - sizeof(ap91_wmac_data.eeprom_data)); - - if (mac_addr) { - memcpy(ap91_wmac_mac, mac_addr, sizeof(ap91_wmac_mac)); - ap91_wmac_data.macaddr = ap91_wmac_mac; - } - - ar71xx_pci_plat_dev_init = ap91_pci_plat_dev_init; - ar71xx_pci_init(ARRAY_SIZE(ap91_pci_irqs), ap91_pci_irqs); - - pci_enable_ath9k_fixup(0, ap91_wmac_data.eeprom_data); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap91-pci.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap91-pci.h deleted file mode 100644 index ebcbc4729..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap91-pci.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Atheros AP91 reference board PCI initialization - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_AP91_PCI_H -#define _AR71XX_DEV_AP91_PCI_H - -#include <linux/leds.h> - -#if defined(CONFIG_AR71XX_DEV_AP91_PCI) -void ap91_pci_init(u8 *cal_data, u8 *mac_addr) __init; -void ap91_pci_setup_wmac_led_pin(int pin) __init; -void ap91_pci_setup_wmac_gpio(u32 mask, u32 val) __init; -void ap91_pci_setup_wmac_leds(struct gpio_led *leds, int num_leds) __init; -#else -static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) { } -static inline void ap91_pci_setup_wmac_led_pin(int pin) { } -static inline void ap91_pci_setup_wmac_gpio(u32 mask, u32 gpio) { } -static inline void ap91_pci_setup_wmac_leds(struct gpio_led *leds, int num_leds) { }; -#endif - -#endif /* _AR71XX_DEV_AP91_PCI_H */ - diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap94-pci.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap94-pci.c deleted file mode 100644 index 05b5be449..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap94-pci.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Atheros AP94 reference board PCI initialization - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/ath9k_platform.h> -#include <linux/delay.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -#include "dev-ap94-pci.h" -#include "pci-ath9k-fixup.h" - -static struct ath9k_platform_data ap94_wmac0_data = { - .led_pin = -1, -}; -static struct ath9k_platform_data ap94_wmac1_data = { - .led_pin = -1, -}; -static char ap94_wmac0_mac[6]; -static char ap94_wmac1_mac[6]; - -static struct ar71xx_pci_irq ap94_pci_irqs[] __initdata = { - { - .slot = 0, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV0, - }, { - .slot = 1, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV1, - } -}; - -static int ap94_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 17: - dev->dev.platform_data = &ap94_wmac0_data; - break; - - case 18: - dev->dev.platform_data = &ap94_wmac1_data; - break; - } - - return 0; -} - -__init void ap94_pci_setup_wmac_led_pin(unsigned wmac, int pin) -{ - switch (wmac) { - case 0: - ap94_wmac0_data.led_pin = pin; - break; - case 1: - ap94_wmac1_data.led_pin = pin; - break; - } -} - -__init void ap94_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val) -{ - switch (wmac) { - case 0: - ap94_wmac0_data.gpio_mask = mask; - ap94_wmac0_data.gpio_val = val; - break; - case 1: - ap94_wmac1_data.gpio_mask = mask; - ap94_wmac1_data.gpio_val = val; - break; - } -} - -void __init ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ - if (cal_data0) - memcpy(ap94_wmac0_data.eeprom_data, cal_data0, - sizeof(ap94_wmac0_data.eeprom_data)); - - if (cal_data1) - memcpy(ap94_wmac1_data.eeprom_data, cal_data1, - sizeof(ap94_wmac1_data.eeprom_data)); - - if (mac_addr0) { - memcpy(ap94_wmac0_mac, mac_addr0, sizeof(ap94_wmac0_mac)); - ap94_wmac0_data.macaddr = ap94_wmac0_mac; - } - - if (mac_addr1) { - memcpy(ap94_wmac1_mac, mac_addr1, sizeof(ap94_wmac1_mac)); - ap94_wmac1_data.macaddr = ap94_wmac1_mac; - } - - ar71xx_pci_plat_dev_init = ap94_pci_plat_dev_init; - ar71xx_pci_init(ARRAY_SIZE(ap94_pci_irqs), ap94_pci_irqs); - - pci_enable_ath9k_fixup(17, ap94_wmac0_data.eeprom_data); - pci_enable_ath9k_fixup(18, ap94_wmac1_data.eeprom_data); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap94-pci.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap94-pci.h deleted file mode 100644 index 458452898..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap94-pci.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Atheros AP94 reference board PCI initialization - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_AP94_PCI_H -#define _AR71XX_DEV_AP94_PCI_H - -#if defined(CONFIG_AR71XX_DEV_AP94_PCI) -void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) __init; - -void ap94_pci_setup_wmac_led_pin(unsigned wmac, int pin) __init; -void ap94_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val) __init; - -#else -static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) {} - -static inline void ap94_pci_setup_wmac_led_pin(unsigned wmac, int pin) {} -static inline void ap94_pci_setup_wmac_gpio(unsigned wmac, - u32 mask, u32 val) {} -#endif - -#endif /* _AR71XX_DEV_AP94_PCI_H */ - diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ar9xxx-wmac.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ar9xxx-wmac.c deleted file mode 100644 index 90db38896..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ar9xxx-wmac.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Atheros AR9XXX SoCs built-in WMAC device support - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/etherdevice.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "dev-ar9xxx-wmac.h" - -#define MHZ_25 (25 * 1000 * 1000) - -static struct ath9k_platform_data ar9xxx_wmac_data = { - .led_pin = -1, -}; -static char ar9xxx_wmac_mac[6]; - -static struct resource ar9xxx_wmac_resources[] = { - { - /* .start and .end fields are filled dynamically */ - .flags = IORESOURCE_MEM, - }, { - .start = AR71XX_CPU_IRQ_IP2, - .end = AR71XX_CPU_IRQ_IP2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device ar9xxx_wmac_device = { - .name = "ath9k", - .id = -1, - .resource = ar9xxx_wmac_resources, - .num_resources = ARRAY_SIZE(ar9xxx_wmac_resources), - .dev = { - .platform_data = &ar9xxx_wmac_data, - }, -}; - -static void ar913x_wmac_init(void) -{ - ar71xx_device_stop(RESET_MODULE_AMBA2WMAC); - mdelay(10); - - ar71xx_device_start(RESET_MODULE_AMBA2WMAC); - mdelay(10); - - ar9xxx_wmac_resources[0].start = AR91XX_WMAC_BASE; - ar9xxx_wmac_resources[0].end = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1; -} - -static int ar933x_r1_get_wmac_revision(void) -{ - return ar71xx_soc_rev; -} - -static int ar933x_wmac_reset(void) -{ - unsigned retries = 0; - - ar71xx_device_stop(AR933X_RESET_WMAC); - ar71xx_device_start(AR933X_RESET_WMAC); - - while (1) { - u32 bootstrap; - - bootstrap = ar71xx_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0) - return 0; - - if (retries > 20) - break; - - udelay(10000); - retries++; - } - - pr_err("ar93xx: WMAC reset timed out"); - return -ETIMEDOUT; -} - -static void ar933x_wmac_init(void) -{ - ar9xxx_wmac_device.name = "ar933x_wmac"; - ar9xxx_wmac_resources[0].start = AR933X_WMAC_BASE; - ar9xxx_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1; - if (ar71xx_ref_freq == MHZ_25) - ar9xxx_wmac_data.is_clk_25mhz = true; - - if (ar71xx_soc_rev == 1) - ar9xxx_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision; - - ar9xxx_wmac_data.external_reset = ar933x_wmac_reset; - - ar933x_wmac_reset(); -} - -static void ar934x_wmac_init(void) -{ - ar9xxx_wmac_device.name = "ar934x_wmac"; - ar9xxx_wmac_resources[0].start = AR934X_WMAC_BASE; - ar9xxx_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1; - ar9xxx_wmac_resources[1].start = AR934X_IP2_IRQ_WMAC; - ar9xxx_wmac_resources[1].start = AR934X_IP2_IRQ_WMAC; - if (ar71xx_ref_freq == MHZ_25) - ar9xxx_wmac_data.is_clk_25mhz = true; -} - -void __init ar9xxx_add_device_wmac(u8 *cal_data, u8 *mac_addr) -{ - switch (ar71xx_soc) { - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - ar913x_wmac_init(); - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - ar933x_wmac_init(); - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - ar934x_wmac_init(); - break; - - default: - BUG(); - } - - if (cal_data) - memcpy(ar9xxx_wmac_data.eeprom_data, cal_data, - sizeof(ar9xxx_wmac_data.eeprom_data)); - - if (mac_addr) { - memcpy(ar9xxx_wmac_mac, mac_addr, sizeof(ar9xxx_wmac_mac)); - ar9xxx_wmac_data.macaddr = ar9xxx_wmac_mac; - } - - platform_device_register(&ar9xxx_wmac_device); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ar9xxx-wmac.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ar9xxx-wmac.h deleted file mode 100644 index 4fa7ec2d3..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-ar9xxx-wmac.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Atheros AR9XXX SoCs built-in WMAC device support - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_AR9XXX_WMAC_H -#define _AR71XX_DEV_AR9XXX_WMAC_H - -void ar9xxx_add_device_wmac(u8 *cal_data, u8 *mac_addr) __init; - -#endif /* _AR71XX_DEV_AR9XXX_WMAC_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-db120-pci.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-db120-pci.c deleted file mode 100644 index 6e6e58376..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-db120-pci.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Atheros db120 reference board PCI initialization - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * Parts of this file are based on Atheros linux 2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/ath9k_platform.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -#include "dev-db120-pci.h" - -static struct ath9k_platform_data db120_wmac_data = { - .led_pin = -1, -}; -static char db120_wmac_mac[6]; - -static struct ar71xx_pci_irq db120_pci_irqs[] __initdata = { - { - .slot = 0, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV0, - } -}; - -static int db120_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 0: - dev->dev.platform_data = &db120_wmac_data; - break; - } - - return 0; -} - -void __init db120_pci_init(u8 *cal_data, u8 *mac_addr) -{ - if (cal_data) - memcpy(db120_wmac_data.eeprom_data, cal_data, - sizeof(db120_wmac_data.eeprom_data)); - - if (mac_addr) { - memcpy(db120_wmac_mac, mac_addr, sizeof(db120_wmac_mac)); - db120_wmac_data.macaddr = db120_wmac_mac; - } - - ar71xx_pci_plat_dev_init = db120_pci_plat_dev_init; - ar71xx_pci_init(ARRAY_SIZE(db120_pci_irqs), db120_pci_irqs); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-db120-pci.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-db120-pci.h deleted file mode 100644 index b96d98955..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-db120-pci.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Atheros DB120 reference board PCI initialization - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * Parts of this file are based on Atheros linux 2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_DB120_PCI_H -#define _AR71XX_DEV_DB120_PCI_H - -#if defined(CONFIG_AR71XX_DEV_DB120_PCI) -void db120_pci_init(u8 *cal_data, u8 *mac_addr); -#else -static inline void db120_pci_init(u8 *cal_data, u8 *mac_addr) { } -#endif - -#endif /* _AR71XX_DEV_DB120_PCI_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-dsa.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-dsa.c deleted file mode 100644 index 8b8fcfac3..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-dsa.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Atheros AR71xx DSA switch device support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/platform_device.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "devices.h" -#include "dev-dsa.h" - -static struct platform_device ar71xx_dsa_switch_device = { - .name = "dsa", - .id = 0, -}; - -void __init ar71xx_add_device_dsa(struct device *netdev, - struct device *miidev, - struct dsa_platform_data *d) -{ - int i; - - d->netdev = netdev; - for (i = 0; i < d->nr_chips; i++) - d->chip[i].mii_bus = miidev; - - ar71xx_dsa_switch_device.dev.platform_data = d; - - platform_device_register(&ar71xx_dsa_switch_device); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-dsa.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-dsa.h deleted file mode 100644 index 25b988130..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-dsa.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Atheros AR71xx DSA switch device support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_DSA_H -#define _AR71XX_DEV_DSA_H - -#include <net/dsa.h> - -void ar71xx_add_device_dsa(struct device *netdev, - struct device *miidev, - struct dsa_platform_data *d) __init; - -#endif /* _AR71XX_DEV_DSA_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-gpio-buttons.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-gpio-buttons.c deleted file mode 100644 index c22e652f1..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-gpio-buttons.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Atheros AR71xx GPIO button support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "linux/init.h" -#include "linux/slab.h" -#include <linux/platform_device.h> - -#include "dev-gpio-buttons.h" - -void __init ar71xx_register_gpio_keys_polled(int id, - unsigned poll_interval, - unsigned nbuttons, - struct gpio_keys_button *buttons) -{ - struct platform_device *pdev; - struct gpio_keys_platform_data pdata; - struct gpio_keys_button *p; - int err; - - p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL); - if (!p) - return; - - memcpy(p, buttons, nbuttons * sizeof(*p)); - - pdev = platform_device_alloc("gpio-keys-polled", id); - if (!pdev) - goto err_free_buttons; - - memset(&pdata, 0, sizeof(pdata)); - pdata.poll_interval = poll_interval; - pdata.nbuttons = nbuttons; - pdata.buttons = p; - - err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); - if (err) - goto err_put_pdev; - - err = platform_device_add(pdev); - if (err) - goto err_put_pdev; - - return; - -err_put_pdev: - platform_device_put(pdev); - -err_free_buttons: - kfree(p); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-gpio-buttons.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-gpio-buttons.h deleted file mode 100644 index 5ed863489..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-gpio-buttons.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Atheros AR71xx GPIO button support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_GPIO_BUTTONS_H -#define _AR71XX_DEV_GPIO_BUTTONS_H - -#include <linux/input.h> -#include <linux/gpio_keys.h> - -void ar71xx_register_gpio_keys_polled(int id, - unsigned poll_interval, - unsigned nbuttons, - struct gpio_keys_button *buttons); - -#endif /* _AR71XX_DEV_GPIO_BUTTONS_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-leds-gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-leds-gpio.c deleted file mode 100644 index 0fb8c6db6..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-leds-gpio.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Atheros AR71xx GPIO LED device support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/slab.h> -#include <linux/platform_device.h> - -#include "dev-leds-gpio.h" - -void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds, - struct gpio_led *leds) -{ - struct platform_device *pdev; - struct gpio_led_platform_data pdata; - struct gpio_led *p; - int err; - - p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL); - if (!p) - return; - - memcpy(p, leds, num_leds * sizeof(*p)); - - pdev = platform_device_alloc("leds-gpio", id); - if (!pdev) - goto err_free_leds; - - memset(&pdata, 0, sizeof(pdata)); - pdata.num_leds = num_leds; - pdata.leds = p; - - err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); - if (err) - goto err_put_pdev; - - err = platform_device_add(pdev); - if (err) - goto err_put_pdev; - - return; - -err_put_pdev: - platform_device_put(pdev); - -err_free_leds: - kfree(p); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-leds-gpio.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-leds-gpio.h deleted file mode 100644 index ab4a89d83..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-leds-gpio.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Atheros AR71xx GPIO LED device support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_LEDS_GPIO_H -#define _AR71XX_DEV_LEDS_GPIO_H - -#include <linux/leds.h> - -void ar71xx_add_device_leds_gpio(int id, - unsigned num_leds, - struct gpio_led *leds) __init; - -#endif /* _AR71XX_DEV_LEDS_GPIO_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-m25p80.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-m25p80.c deleted file mode 100644 index cf6580ec0..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-m25p80.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/concat.h> - -#include "devices.h" -#include "dev-m25p80.h" - -static struct spi_board_info ar71xx_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - }, - { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "m25p80", - } -}; - -void __init ar71xx_add_device_m25p80(struct flash_platform_data *pdata) -{ - ar71xx_spi_info[0].platform_data = pdata; - ar71xx_add_device_spi(NULL, ar71xx_spi_info, 1); -} - -static struct flash_platform_data *multi_pdata; - -static struct mtd_info *concat_devs[2] = { NULL, NULL }; -static struct work_struct mtd_concat_work; - -static void mtd_concat_add_work(struct work_struct *work) -{ - struct mtd_info *mtd; - - mtd = mtd_concat_create(concat_devs, ARRAY_SIZE(concat_devs), "flash"); - -#ifdef CONFIG_MTD_PARTITIONS - add_mtd_partitions(mtd, multi_pdata->parts, multi_pdata->nr_parts); -#else - add_mtd_device(mtd); -#endif -} - -static void mtd_concat_add(struct mtd_info *mtd) -{ - static bool registered = false; - - if (registered) - return; - - if (!strcmp(mtd->name, "spi0.0")) - concat_devs[0] = mtd; - else if (!strcmp(mtd->name, "spi0.1")) - concat_devs[1] = mtd; - else - return; - - if (!concat_devs[0] || !concat_devs[1]) - return; - - registered = true; - INIT_WORK(&mtd_concat_work, mtd_concat_add_work); - schedule_work(&mtd_concat_work); -} - -static void mtd_concat_remove(struct mtd_info *mtd) -{ -} - -static void add_mtd_concat_notifier(void) -{ - static struct mtd_notifier not = { - .add = mtd_concat_add, - .remove = mtd_concat_remove, - }; - - register_mtd_user(¬); -} - - -void __init ar71xx_add_device_m25p80_multi(struct flash_platform_data *pdata) -{ - multi_pdata = pdata; - add_mtd_concat_notifier(); - ar71xx_add_device_spi(NULL, ar71xx_spi_info, ARRAY_SIZE(ar71xx_spi_info)); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-m25p80.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-m25p80.h deleted file mode 100644 index f732a8438..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-m25p80.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_M25P80_H -#define _AR71XX_DEV_M25P80_H - -#include <linux/spi/flash.h> - -void ar71xx_add_device_m25p80(struct flash_platform_data *pdata) __init; -void ar71xx_add_device_m25p80_multi(struct flash_platform_data *pdata) __init; - -#endif /* _AR71XX_DEV_M25P80_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb42-pci.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb42-pci.c deleted file mode 100644 index 0678567a2..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb42-pci.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Atheros PB42 reference board PCI initialization - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -#include "dev-pb42-pci.h" - -static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = { - { - .slot = 0, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV0, - }, { - .slot = 1, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV1, - }, { - .slot = 2, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV2, - } -}; - -void __init pb42_pci_init(void) -{ - ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb42-pci.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb42-pci.h deleted file mode 100644 index f9ef95123..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb42-pci.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Atheros PB42 reference board PCI initialization - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_PB42_PCI_H -#define _AR71XX_DEV_PB42_PCI_H - -#if defined(CONFIG_AR71XX_DEV_PB42_PCI) -void pb42_pci_init(void) __init; -#else -static inline void pb42_pci_init(void) { } -#endif - -#endif /* _AR71XX_DEV_PB42_PCI_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.c deleted file mode 100644 index 762bd5534..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Atheros PB9x reference board PCI initialization - * - * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -#include "dev-pb9x-pci.h" - -static struct ar71xx_pci_irq pb9x_pci_irqs[] __initdata = { - { - .slot = 0, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV0, - } -}; - -void __init pb9x_pci_init(void) -{ - ar71xx_pci_init(ARRAY_SIZE(pb9x_pci_irqs), pb9x_pci_irqs); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.h deleted file mode 100644 index be53f0a66..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Atheros PB9x reference board PCI initialization - * - * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_PB9X_PCI_H -#define _AR71XX_DEV_PB9X_PCI_H - -#if defined(CONFIG_AR71XX_DEV_PB9X_PCI) -void pb9x_pci_init(void) __init; -#else -static inline void pb9x_pci_init(void) { } -#endif - -#endif /* _AR71XX_DEV_PB9X_PCI_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c deleted file mode 100644 index 57c7ef292..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c +++ /dev/null @@ -1,246 +0,0 @@ -/* - * Atheros AR71xx USB host device support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/dma-mapping.h> -#include <linux/platform_device.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/platform.h> - -#include "dev-usb.h" - -/* - * OHCI (USB full speed host controller) - */ -static struct resource ar71xx_ohci_resources[] = { - [0] = { - .start = AR71XX_OHCI_BASE, - .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AR71XX_MISC_IRQ_OHCI, - .end = AR71XX_MISC_IRQ_OHCI, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource ar7240_ohci_resources[] = { - [0] = { - .start = AR7240_OHCI_BASE, - .end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AR71XX_CPU_IRQ_USB, - .end = AR71XX_CPU_IRQ_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32); -static struct platform_device ar71xx_ohci_device = { - .name = "ar71xx-ohci", - .id = -1, - .resource = ar71xx_ohci_resources, - .num_resources = ARRAY_SIZE(ar71xx_ohci_resources), - .dev = { - .dma_mask = &ar71xx_ohci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -/* - * EHCI (USB high/full speed host controller) - */ -static struct resource ar71xx_ehci_resources[] = { - [0] = { - .start = AR71XX_EHCI_BASE, - .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AR71XX_CPU_IRQ_USB, - .end = AR71XX_CPU_IRQ_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32); -static struct ar71xx_ehci_platform_data ar71xx_ehci_data; - -static struct platform_device ar71xx_ehci_device = { - .name = "ar71xx-ehci", - .id = -1, - .resource = ar71xx_ehci_resources, - .num_resources = ARRAY_SIZE(ar71xx_ehci_resources), - .dev = { - .dma_mask = &ar71xx_ehci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &ar71xx_ehci_data, - }, -}; - -#define AR71XX_USB_RESET_MASK \ - (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \ - | RESET_MODULE_USB_OHCI_DLL) - -#define AR7240_USB_RESET_MASK \ - (RESET_MODULE_USB_HOST | RESET_MODULE_USB_OHCI_DLL_7240) - -static void __init ar71xx_usb_setup(void) -{ - ar71xx_device_stop(AR71XX_USB_RESET_MASK); - mdelay(1000); - ar71xx_device_start(AR71XX_USB_RESET_MASK); - - /* Turning on the Buff and Desc swap bits */ - ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000); - - /* WAR for HW bug. Here it adjusts the duration between two SOFS */ - ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00); - - mdelay(900); - - platform_device_register(&ar71xx_ohci_device); - platform_device_register(&ar71xx_ehci_device); -} - -static void __init ar7240_usb_setup(void) -{ - ar71xx_device_stop(AR7240_USB_RESET_MASK); - mdelay(1000); - ar71xx_device_start(AR7240_USB_RESET_MASK); - - /* WAR for HW bug. Here it adjusts the duration between two SOFS */ - ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3); - - ar71xx_ohci_device.resource = ar7240_ohci_resources; - ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources); - platform_device_register(&ar71xx_ohci_device); -} - -static void __init ar7241_usb_setup(void) -{ - ar71xx_device_start(AR724X_RESET_USBSUS_OVERRIDE); - mdelay(10); - - ar71xx_device_start(AR724X_RESET_USB_HOST); - mdelay(10); - - ar71xx_device_start(AR724X_RESET_USB_PHY); - mdelay(10); - - ar71xx_ehci_data.is_ar91xx = 1; - ar71xx_ehci_device.resource = ar7240_ohci_resources; - ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources); - platform_device_register(&ar71xx_ehci_device); -} - -static void __init ar91xx_usb_setup(void) -{ - ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE); - mdelay(10); - - ar71xx_device_start(RESET_MODULE_USB_HOST); - mdelay(10); - - ar71xx_device_start(RESET_MODULE_USB_PHY); - mdelay(10); - - ar71xx_ehci_data.is_ar91xx = 1; - platform_device_register(&ar71xx_ehci_device); -} - -static void __init ar933x_usb_setup(void) -{ - ar71xx_device_reset_rmw(0, AR933X_RESET_USBSUS_OVERRIDE); - mdelay(10); - - ar71xx_device_reset_rmw(AR933X_RESET_USB_HOST, - AR933X_RESET_USBSUS_OVERRIDE); - mdelay(10); - - ar71xx_device_reset_rmw(AR933X_RESET_USB_PHY, - AR933X_RESET_USBSUS_OVERRIDE); - mdelay(10); - - ar71xx_ehci_data.is_ar91xx = 1; - platform_device_register(&ar71xx_ehci_device); -} - -static void __init ar934x_usb_setup(void) -{ - u32 bootstrap; - - bootstrap = ar71xx_reset_rr(AR934X_RESET_REG_BOOTSTRAP); - if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) - return; - - ar71xx_device_stop(AR934X_RESET_USBSUS_OVERRIDE); - udelay(1000); - - ar71xx_device_start(AR934X_RESET_USB_PHY); - udelay(1000); - - ar71xx_device_start(AR934X_RESET_USB_PHY_ANALOG); - udelay(1000); - - ar71xx_device_start(AR934X_RESET_USB_HOST); - udelay(1000); - - ar71xx_ehci_data.is_ar91xx = 1; - platform_device_register(&ar71xx_ehci_device); -} - -void __init ar71xx_add_device_usb(void) -{ - switch (ar71xx_soc) { - case AR71XX_SOC_AR7240: - ar7240_usb_setup(); - break; - - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - ar7241_usb_setup(); - break; - - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - ar71xx_usb_setup(); - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - ar91xx_usb_setup(); - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - ar933x_usb_setup(); - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - ar934x_usb_setup(); - break; - - default: - BUG(); - } -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.h deleted file mode 100644 index aa49f539c..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Atheros AR71xx USB host device support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_DEV_USB_H -#define _AR71XX_DEV_USB_H - -void ar71xx_add_device_usb(void) __init; - -#endif /* _AR71XX_DEV_USB_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c deleted file mode 100644 index 75b24b004..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c +++ /dev/null @@ -1,1076 +0,0 @@ -/* - * Atheros AR71xx SoC platform devices - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros 2.6.15 BSP - * Parts of this file are based on Atheros 2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/etherdevice.h> -#include <linux/platform_device.h> -#include <linux/serial_8250.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/ar933x_uart_platform.h> - -#include "devices.h" - -unsigned char ar71xx_mac_base[ETH_ALEN] __initdata; - -static struct resource ar71xx_uart_resources[] = { - { - .start = AR71XX_UART_BASE, - .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP) -static struct plat_serial8250_port ar71xx_uart_data[] = { - { - .mapbase = AR71XX_UART_BASE, - .irq = AR71XX_MISC_IRQ_UART, - .flags = AR71XX_UART_FLAGS, - .iotype = UPIO_MEM32, - .regshift = 2, - }, { - /* terminating entry */ - } -}; - -static struct platform_device ar71xx_uart_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .resource = ar71xx_uart_resources, - .num_resources = ARRAY_SIZE(ar71xx_uart_resources), - .dev = { - .platform_data = ar71xx_uart_data - }, -}; - -static struct resource ar933x_uart_resources[] = { - { - .start = AR933X_UART_BASE, - .end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = AR71XX_MISC_IRQ_UART, - .end = AR71XX_MISC_IRQ_UART, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct ar933x_uart_platform_data ar933x_uart_data; -static struct platform_device ar933x_uart_device = { - .name = "ar933x-uart", - .id = -1, - .resource = ar933x_uart_resources, - .num_resources = ARRAY_SIZE(ar933x_uart_resources), - .dev = { - .platform_data = &ar933x_uart_data, - }, -}; - -void __init ar71xx_add_device_uart(void) -{ - struct platform_device *pdev; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - pdev = &ar71xx_uart_device; - ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq; - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - pdev = &ar933x_uart_device; - ar933x_uart_data.uartclk = ar71xx_ref_freq; - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - pdev = &ar71xx_uart_device; - ar71xx_uart_data[0].uartclk = ar71xx_ref_freq; - break; - - default: - BUG(); - } - - platform_device_register(pdev); -} - -static struct resource ar71xx_mdio0_resources[] = { - { - .name = "mdio_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE0_BASE, - .end = AR71XX_GE0_BASE + 0x200 - 1, - } -}; - -static struct ag71xx_mdio_platform_data ar71xx_mdio0_data; - -struct platform_device ar71xx_mdio0_device = { - .name = "ag71xx-mdio", - .id = 0, - .resource = ar71xx_mdio0_resources, - .num_resources = ARRAY_SIZE(ar71xx_mdio0_resources), - .dev = { - .platform_data = &ar71xx_mdio0_data, - }, -}; - -static struct resource ar71xx_mdio1_resources[] = { - { - .name = "mdio_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE1_BASE, - .end = AR71XX_GE1_BASE + 0x200 - 1, - } -}; - -static struct ag71xx_mdio_platform_data ar71xx_mdio1_data; - -struct platform_device ar71xx_mdio1_device = { - .name = "ag71xx-mdio", - .id = 1, - .resource = ar71xx_mdio1_resources, - .num_resources = ARRAY_SIZE(ar71xx_mdio1_resources), - .dev = { - .platform_data = &ar71xx_mdio1_data, - }, -}; - -static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift) -{ - void __iomem *base; - u32 t; - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - - t = __raw_readl(base + cfg_reg); - t &= ~(3 << shift); - t |= (2 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - __raw_writel(pll_val, base + pll_reg); - - t |= (3 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - t &= ~(3 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n", - (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg)); - - iounmap(base); -} - -static void __init ar71xx_mii_ctrl_set_if(unsigned int reg, - unsigned int mii_if) -{ - void __iomem *base; - u32 t; - - base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); - - t = __raw_readl(base + reg); - t &= ~(MII_CTRL_IF_MASK); - t |= (mii_if & MII_CTRL_IF_MASK); - __raw_writel(t, base + reg); - - iounmap(base); -} - -static void ar71xx_mii_ctrl_set_speed(unsigned int reg, unsigned int speed) -{ - void __iomem *base; - unsigned int mii_speed; - u32 t; - - switch (speed) { - case SPEED_10: - mii_speed = MII_CTRL_SPEED_10; - break; - case SPEED_100: - mii_speed = MII_CTRL_SPEED_100; - break; - case SPEED_1000: - mii_speed = MII_CTRL_SPEED_1000; - break; - default: - BUG(); - } - - base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); - - t = __raw_readl(base + reg); - t &= ~(MII_CTRL_SPEED_MASK << MII_CTRL_SPEED_SHIFT); - t |= mii_speed << MII_CTRL_SPEED_SHIFT; - __raw_writel(t, base + reg); - - iounmap(base); -} - -void __init ar71xx_add_device_mdio(unsigned int id, u32 phy_mask) -{ - struct platform_device *mdio_dev; - struct ag71xx_mdio_platform_data *mdio_data; - unsigned int max_id; - - if (ar71xx_soc == AR71XX_SOC_AR9341 || - ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344) - max_id = 1; - else - max_id = 0; - - if (id > max_id) { - printk(KERN_ERR "ar71xx: invalid MDIO id %u\n", id); - return; - } - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - mdio_dev = &ar71xx_mdio1_device; - mdio_data = &ar71xx_mdio1_data; - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - if (id == 0) { - mdio_dev = &ar71xx_mdio0_device; - mdio_data = &ar71xx_mdio0_data; - } else { - mdio_dev = &ar71xx_mdio1_device; - mdio_data = &ar71xx_mdio1_data; - } - break; - - case AR71XX_SOC_AR7242: - ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, - AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000, - AR71XX_ETH0_PLL_SHIFT); - /* fall through */ - default: - mdio_dev = &ar71xx_mdio0_device; - mdio_data = &ar71xx_mdio0_data; - break; - } - - mdio_data->phy_mask = phy_mask; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - mdio_data->is_ar7240 = 1; - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - if (id == 1) - mdio_data->is_ar7240 = 1; - break; - - default: - break; - } - - platform_device_register(mdio_dev); -} - -struct ar71xx_eth_pll_data ar71xx_eth0_pll_data; -struct ar71xx_eth_pll_data ar71xx_eth1_pll_data; - -static u32 ar71xx_get_eth_pll(unsigned int mac, int speed) -{ - struct ar71xx_eth_pll_data *pll_data; - u32 pll_val; - - switch (mac) { - case 0: - pll_data = &ar71xx_eth0_pll_data; - break; - case 1: - pll_data = &ar71xx_eth1_pll_data; - break; - default: - BUG(); - } - - switch (speed) { - case SPEED_10: - pll_val = pll_data->pll_10; - break; - case SPEED_100: - pll_val = pll_data->pll_100; - break; - case SPEED_1000: - pll_val = pll_data->pll_1000; - break; - default: - BUG(); - } - - return pll_val; -} - -static void ar71xx_set_speed_ge0(int speed) -{ - u32 val = ar71xx_get_eth_pll(0, speed); - - ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK, - val, AR71XX_ETH0_PLL_SHIFT); - ar71xx_mii_ctrl_set_speed(MII_REG_MII0_CTRL, speed); -} - -static void ar71xx_set_speed_ge1(int speed) -{ - u32 val = ar71xx_get_eth_pll(1, speed); - - ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK, - val, AR71XX_ETH1_PLL_SHIFT); - ar71xx_mii_ctrl_set_speed(MII_REG_MII1_CTRL, speed); -} - -static void ar724x_set_speed_ge0(int speed) -{ - /* TODO */ -} - -static void ar724x_set_speed_ge1(int speed) -{ - /* TODO */ -} - -static void ar7242_set_speed_ge0(int speed) -{ - u32 val = ar71xx_get_eth_pll(0, speed); - void __iomem *base; - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - __raw_writel(val, base + AR7242_PLL_REG_ETH0_INT_CLOCK); - iounmap(base); -} - -static void ar91xx_set_speed_ge0(int speed) -{ - u32 val = ar71xx_get_eth_pll(0, speed); - - ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK, - val, AR91XX_ETH0_PLL_SHIFT); - ar71xx_mii_ctrl_set_speed(MII_REG_MII0_CTRL, speed); -} - -static void ar91xx_set_speed_ge1(int speed) -{ - u32 val = ar71xx_get_eth_pll(1, speed); - - ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK, - val, AR91XX_ETH1_PLL_SHIFT); - ar71xx_mii_ctrl_set_speed(MII_REG_MII1_CTRL, speed); -} - -static void ar933x_set_speed_ge0(int speed) -{ - /* TODO */ -} - -static void ar933x_set_speed_ge1(int speed) -{ - /* TODO */ -} - -static void ar934x_set_speed_ge0(int speed) -{ - /* TODO */ -} - -static void ar934x_set_speed_ge1(int speed) -{ - /* TODO */ -} - -static void ar71xx_ddr_flush_ge0(void) -{ - ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0); -} - -static void ar71xx_ddr_flush_ge1(void) -{ - ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1); -} - -static void ar724x_ddr_flush_ge0(void) -{ - ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0); -} - -static void ar724x_ddr_flush_ge1(void) -{ - ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1); -} - -static void ar91xx_ddr_flush_ge0(void) -{ - ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0); -} - -static void ar91xx_ddr_flush_ge1(void) -{ - ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1); -} - -static void ar933x_ddr_flush_ge0(void) -{ - ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE0); -} - -static void ar933x_ddr_flush_ge1(void) -{ - ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE1); -} - -static void ar934x_ddr_flush_ge0(void) -{ - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_GE0); -} - -static void ar934x_ddr_flush_ge1(void) -{ - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_GE1); -} - -static struct resource ar71xx_eth0_resources[] = { - { - .name = "mac_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE0_BASE, - .end = AR71XX_GE0_BASE + 0x200 - 1, - }, { - .name = "mac_irq", - .flags = IORESOURCE_IRQ, - .start = AR71XX_CPU_IRQ_GE0, - .end = AR71XX_CPU_IRQ_GE0, - }, -}; - -struct ag71xx_platform_data ar71xx_eth0_data = { - .reset_bit = RESET_MODULE_GE0_MAC, -}; - -struct platform_device ar71xx_eth0_device = { - .name = "ag71xx", - .id = 0, - .resource = ar71xx_eth0_resources, - .num_resources = ARRAY_SIZE(ar71xx_eth0_resources), - .dev = { - .platform_data = &ar71xx_eth0_data, - }, -}; - -static struct resource ar71xx_eth1_resources[] = { - { - .name = "mac_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE1_BASE, - .end = AR71XX_GE1_BASE + 0x200 - 1, - }, { - .name = "mac_irq", - .flags = IORESOURCE_IRQ, - .start = AR71XX_CPU_IRQ_GE1, - .end = AR71XX_CPU_IRQ_GE1, - }, -}; - -struct ag71xx_platform_data ar71xx_eth1_data = { - .reset_bit = RESET_MODULE_GE1_MAC, -}; - -struct platform_device ar71xx_eth1_device = { - .name = "ag71xx", - .id = 1, - .resource = ar71xx_eth1_resources, - .num_resources = ARRAY_SIZE(ar71xx_eth1_resources), - .dev = { - .platform_data = &ar71xx_eth1_data, - }, -}; - -struct ag71xx_switch_platform_data ar71xx_switch_data; - -#define AR71XX_PLL_VAL_1000 0x00110000 -#define AR71XX_PLL_VAL_100 0x00001099 -#define AR71XX_PLL_VAL_10 0x00991099 - -#define AR724X_PLL_VAL_1000 0x00110000 -#define AR724X_PLL_VAL_100 0x00001099 -#define AR724X_PLL_VAL_10 0x00991099 - -#define AR7242_PLL_VAL_1000 0x16000000 -#define AR7242_PLL_VAL_100 0x00000101 -#define AR7242_PLL_VAL_10 0x00001616 - -#define AR91XX_PLL_VAL_1000 0x1a000000 -#define AR91XX_PLL_VAL_100 0x13000a44 -#define AR91XX_PLL_VAL_10 0x00441099 - -#define AR933X_PLL_VAL_1000 0x00110000 -#define AR933X_PLL_VAL_100 0x00001099 -#define AR933X_PLL_VAL_10 0x00991099 - -#define AR934X_PLL_VAL_1000 0x00110000 -#define AR934X_PLL_VAL_100 0x00001099 -#define AR934X_PLL_VAL_10 0x00991099 - -static void __init ar71xx_init_eth_pll_data(unsigned int id) -{ - struct ar71xx_eth_pll_data *pll_data; - u32 pll_10, pll_100, pll_1000; - - switch (id) { - case 0: - pll_data = &ar71xx_eth0_pll_data; - break; - case 1: - pll_data = &ar71xx_eth1_pll_data; - break; - default: - BUG(); - } - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - pll_10 = AR71XX_PLL_VAL_10; - pll_100 = AR71XX_PLL_VAL_100; - pll_1000 = AR71XX_PLL_VAL_1000; - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - pll_10 = AR724X_PLL_VAL_10; - pll_100 = AR724X_PLL_VAL_100; - pll_1000 = AR724X_PLL_VAL_1000; - break; - - case AR71XX_SOC_AR7242: - pll_10 = AR7242_PLL_VAL_10; - pll_100 = AR7242_PLL_VAL_100; - pll_1000 = AR7242_PLL_VAL_1000; - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - pll_10 = AR91XX_PLL_VAL_10; - pll_100 = AR91XX_PLL_VAL_100; - pll_1000 = AR91XX_PLL_VAL_1000; - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - pll_10 = AR933X_PLL_VAL_10; - pll_100 = AR933X_PLL_VAL_100; - pll_1000 = AR933X_PLL_VAL_1000; - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - pll_10 = AR934X_PLL_VAL_10; - pll_100 = AR934X_PLL_VAL_100; - pll_1000 = AR934X_PLL_VAL_1000; - break; - - default: - BUG(); - } - - if (!pll_data->pll_10) - pll_data->pll_10 = pll_10; - - if (!pll_data->pll_100) - pll_data->pll_100 = pll_100; - - if (!pll_data->pll_1000) - pll_data->pll_1000 = pll_1000; -} - -static int __init ar71xx_setup_phy_if_mode(unsigned int id, - struct ag71xx_platform_data *pdata) -{ - unsigned int mii_if; - - switch (id) { - case 0: - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - mii_if = MII0_CTRL_IF_MII; - break; - case PHY_INTERFACE_MODE_GMII: - mii_if = MII0_CTRL_IF_GMII; - break; - case PHY_INTERFACE_MODE_RGMII: - mii_if = MII0_CTRL_IF_RGMII; - break; - case PHY_INTERFACE_MODE_RMII: - mii_if = MII0_CTRL_IF_RMII; - break; - default: - return -EINVAL; - } - ar71xx_mii_ctrl_set_if(MII_REG_MII0_CTRL, mii_if); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - pdata->phy_if_mode = PHY_INTERFACE_MODE_MII; - break; - - case AR71XX_SOC_AR7242: - /* FIXME */ - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RMII: - break; - default: - return -EINVAL; - } - break; - - default: - BUG(); - } - break; - case 1: - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_RMII: - mii_if = MII1_CTRL_IF_RMII; - break; - case PHY_INTERFACE_MODE_RGMII: - mii_if = MII1_CTRL_IF_RGMII; - break; - default: - return -EINVAL; - } - ar71xx_mii_ctrl_set_if(MII_REG_MII1_CTRL, mii_if); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; - break; - - case AR71XX_SOC_AR7242: - /* FIXME */ - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - break; - default: - return -EINVAL; - } - break; - - default: - BUG(); - } - break; - } - - return 0; -} - -static int ar71xx_eth_instance __initdata; -void __init ar71xx_add_device_eth(unsigned int id) -{ - struct platform_device *pdev; - struct ag71xx_platform_data *pdata; - int err; - - if (id > 1) { - printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id); - return; - } - - ar71xx_init_eth_pll_data(id); - - if (id == 0) - pdev = &ar71xx_eth0_device; - else - pdev = &ar71xx_eth1_device; - - pdata = pdev->dev.platform_data; - - err = ar71xx_setup_phy_if_mode(id, pdata); - if (err) { - printk(KERN_ERR - "ar71xx: invalid PHY interface mode for GE%u\n", id); - return; - } - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - if (id == 0) { - pdata->ddr_flush = ar71xx_ddr_flush_ge0; - pdata->set_speed = ar71xx_set_speed_ge0; - } else { - pdata->ddr_flush = ar71xx_ddr_flush_ge1; - pdata->set_speed = ar71xx_set_speed_ge1; - } - break; - - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - if (id == 0) { - pdata->ddr_flush = ar71xx_ddr_flush_ge0; - pdata->set_speed = ar71xx_set_speed_ge0; - } else { - pdata->ddr_flush = ar71xx_ddr_flush_ge1; - pdata->set_speed = ar71xx_set_speed_ge1; - } - pdata->has_gbit = 1; - break; - - case AR71XX_SOC_AR7242: - if (id == 0) { - pdata->reset_bit |= AR724X_RESET_GE0_MDIO | - RESET_MODULE_GE0_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge0; - pdata->set_speed = ar7242_set_speed_ge0; - } else { - pdata->reset_bit |= AR724X_RESET_GE1_MDIO | - RESET_MODULE_GE1_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge1; - pdata->set_speed = ar724x_set_speed_ge1; - } - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case AR71XX_SOC_AR7241: - if (id == 0) - pdata->reset_bit |= AR724X_RESET_GE0_MDIO; - else - pdata->reset_bit |= AR724X_RESET_GE1_MDIO; - /* fall through */ - case AR71XX_SOC_AR7240: - if (id == 0) { - pdata->reset_bit |= RESET_MODULE_GE0_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge0; - pdata->set_speed = ar724x_set_speed_ge0; - - pdata->phy_mask = BIT(4); - } else { - pdata->reset_bit |= RESET_MODULE_GE1_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge1; - pdata->set_speed = ar724x_set_speed_ge1; - - pdata->speed = SPEED_1000; - pdata->duplex = DUPLEX_FULL; - pdata->switch_data = &ar71xx_switch_data; - } - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - if (ar71xx_soc == AR71XX_SOC_AR7240) - pdata->is_ar7240 = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case AR71XX_SOC_AR9130: - if (id == 0) { - pdata->ddr_flush = ar91xx_ddr_flush_ge0; - pdata->set_speed = ar91xx_set_speed_ge0; - } else { - pdata->ddr_flush = ar91xx_ddr_flush_ge1; - pdata->set_speed = ar91xx_set_speed_ge1; - } - pdata->is_ar91xx = 1; - break; - - case AR71XX_SOC_AR9132: - if (id == 0) { - pdata->ddr_flush = ar91xx_ddr_flush_ge0; - pdata->set_speed = ar91xx_set_speed_ge0; - } else { - pdata->ddr_flush = ar91xx_ddr_flush_ge1; - pdata->set_speed = ar91xx_set_speed_ge1; - } - pdata->is_ar91xx = 1; - pdata->has_gbit = 1; - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - if (id == 0) { - pdata->reset_bit = AR933X_RESET_GE0_MAC | - AR933X_RESET_GE0_MDIO; - pdata->ddr_flush = ar933x_ddr_flush_ge0; - pdata->set_speed = ar933x_set_speed_ge0; - - pdata->phy_mask = BIT(4); - } else { - pdata->reset_bit = AR933X_RESET_GE1_MAC | - AR933X_RESET_GE1_MDIO; - pdata->ddr_flush = ar933x_ddr_flush_ge1; - pdata->set_speed = ar933x_set_speed_ge1; - - pdata->speed = SPEED_1000; - pdata->duplex = DUPLEX_FULL; - pdata->switch_data = &ar71xx_switch_data; - } - - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - if (id == 0) { - pdata->reset_bit = AR934X_RESET_GE0_MAC | - AR934X_RESET_GE0_MDIO; - pdata->ddr_flush =ar934x_ddr_flush_ge0; - pdata->set_speed = ar934x_set_speed_ge0; - } else { - pdata->reset_bit = AR934X_RESET_GE1_MAC | - AR934X_RESET_GE1_MDIO; - pdata->ddr_flush = ar934x_ddr_flush_ge1; - pdata->set_speed = ar934x_set_speed_ge1; - - pdata->switch_data = &ar71xx_switch_data; - } - - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - default: - BUG(); - } - - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_GMII: - case PHY_INTERFACE_MODE_RGMII: - if (!pdata->has_gbit) { - printk(KERN_ERR "ar71xx: no gbit available on eth%d\n", - id); - return; - } - /* fallthrough */ - default: - break; - } - - if (!is_valid_ether_addr(pdata->mac_addr)) { - random_ether_addr(pdata->mac_addr); - printk(KERN_DEBUG - "ar71xx: using random MAC address for eth%d\n", - ar71xx_eth_instance); - } - - if (pdata->mii_bus_dev == NULL) { - switch (ar71xx_soc) { - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - if (id == 0) - pdata->mii_bus_dev = &ar71xx_mdio0_device.dev; - else - pdata->mii_bus_dev = &ar71xx_mdio1_device.dev; - break; - - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - pdata->mii_bus_dev = &ar71xx_mdio1_device.dev; - break; - - default: - pdata->mii_bus_dev = &ar71xx_mdio0_device.dev; - break; - } - } - - /* Reset the device */ - ar71xx_device_stop(pdata->reset_bit); - mdelay(100); - - ar71xx_device_start(pdata->reset_bit); - mdelay(100); - - platform_device_register(pdev); - ar71xx_eth_instance++; -} - -static struct resource ar71xx_spi_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device ar71xx_spi_device = { - .name = "ar71xx-spi", - .id = -1, - .resource = ar71xx_spi_resources, - .num_resources = ARRAY_SIZE(ar71xx_spi_resources), -}; - -void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata, - struct spi_board_info const *info, - unsigned n) -{ - spi_register_board_info(info, n); - ar71xx_spi_device.dev.platform_data = pdata; - platform_device_register(&ar71xx_spi_device); -} - -void __init ar71xx_add_device_wdt(void) -{ - platform_device_register_simple("ar71xx-wdt", -1, NULL, 0); -} - -void __init ar71xx_set_mac_base(unsigned char *mac) -{ - memcpy(ar71xx_mac_base, mac, ETH_ALEN); -} - -void __init ar71xx_parse_mac_addr(char *mac_str) -{ - u8 tmp[ETH_ALEN]; - int t; - - t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]); - - if (t != ETH_ALEN) - t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx", - &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]); - - if (t == ETH_ALEN) - ar71xx_set_mac_base(tmp); - else - printk(KERN_DEBUG "ar71xx: failed to parse mac address " - "\"%s\"\n", mac_str); -} - -static int __init ar71xx_ethaddr_setup(char *str) -{ - ar71xx_parse_mac_addr(str); - return 1; -} -__setup("ethaddr=", ar71xx_ethaddr_setup); - -static int __init ar71xx_kmac_setup(char *str) -{ - ar71xx_parse_mac_addr(str); - return 1; -} -__setup("kmac=", ar71xx_kmac_setup); - -void __init ar71xx_init_mac(unsigned char *dst, const unsigned char *src, - int offset) -{ - int t; - - if (!is_valid_ether_addr(src)) { - memset(dst, '\0', ETH_ALEN); - return; - } - - t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]); - t += offset; - - dst[0] = src[0]; - dst[1] = src[1]; - dst[2] = src[2]; - dst[3] = (t >> 16) & 0xff; - dst[4] = (t >> 8) & 0xff; - dst[5] = t & 0xff; -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.h b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.h deleted file mode 100644 index 0f75fe7d8..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Atheros AR71xx SoC device definitions - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __AR71XX_DEVICES_H -#define __AR71XX_DEVICES_H - -#include <asm/mach-ar71xx/platform.h> - -struct platform_device; - -void ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata, - struct spi_board_info const *info, - unsigned n) __init; - -extern unsigned char ar71xx_mac_base[] __initdata; -void ar71xx_parse_mac_addr(char *mac_str) __init; -void ar71xx_init_mac(unsigned char *dst, const unsigned char *src, - int offset) __init; - -struct ar71xx_eth_pll_data { - u32 pll_10; - u32 pll_100; - u32 pll_1000; -}; - -extern struct ar71xx_eth_pll_data ar71xx_eth0_pll_data; -extern struct ar71xx_eth_pll_data ar71xx_eth1_pll_data; - -extern struct ag71xx_platform_data ar71xx_eth0_data; -extern struct ag71xx_platform_data ar71xx_eth1_data; -extern struct platform_device ar71xx_eth0_device; -extern struct platform_device ar71xx_eth1_device; -void ar71xx_add_device_eth(unsigned int id) __init; - -extern struct ag71xx_switch_platform_data ar71xx_switch_data; - -extern struct platform_device ar71xx_mdio0_device; -extern struct platform_device ar71xx_mdio1_device; -void ar71xx_add_device_mdio(unsigned int id, u32 phy_mask) __init; - -void ar71xx_add_device_uart(void) __init; - -void ar71xx_add_device_wdt(void) __init; - -#endif /* __AR71XX_DEVICES_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c b/target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c deleted file mode 100644 index c85a04d2c..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Atheros AR7xxx/AR9xxx SoC early printk support - * - * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/errno.h> -#include <linux/io.h> -#include <linux/serial_reg.h> -#include <asm/addrspace.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/ar933x_uart.h> - -static void (*_prom_putchar) (unsigned char); - -static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val) -{ - u32 t; - - do { - t = __raw_readl(reg); - if ((t & mask) == val) - break; - } while (1); -} - -static void prom_putchar_ar71xx(unsigned char ch) -{ - void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); - - prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); - __raw_writel(ch, base + UART_TX * 4); - prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); -} - -static void prom_putchar_ar933x(unsigned char ch) -{ - void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE)); - - prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR, - AR933X_UART_DATA_TX_CSR); - __raw_writel(AR933X_UART_DATA_TX_CSR | ch, base + AR933X_UART_DATA_REG); - prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR, - AR933X_UART_DATA_TX_CSR); -} - -static void prom_putchar_dummy(unsigned char ch) -{ - /* nothing to do */ -} - -static void prom_putchar_init(void) -{ - void __iomem *base; - u32 id; - - base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE)); - id = __raw_readl(base + AR71XX_RESET_REG_REV_ID); - id &= REV_ID_MAJOR_MASK; - - switch (id) { - case REV_ID_MAJOR_AR71XX: - case REV_ID_MAJOR_AR7240: - case REV_ID_MAJOR_AR7241: - case REV_ID_MAJOR_AR7242: - case REV_ID_MAJOR_AR913X: - case REV_ID_MAJOR_AR9341: - case REV_ID_MAJOR_AR9342: - case REV_ID_MAJOR_AR9344: - _prom_putchar = prom_putchar_ar71xx; - break; - - case REV_ID_MAJOR_AR9330: - case REV_ID_MAJOR_AR9331: - _prom_putchar = prom_putchar_ar933x; - break; - - default: - _prom_putchar = prom_putchar_dummy; - break; - } -} - -void prom_putchar(unsigned char ch) -{ - if (!_prom_putchar) - prom_putchar_init(); - - _prom_putchar(ch); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c deleted file mode 100644 index 91c838345..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c +++ /dev/null @@ -1,302 +0,0 @@ -/* - * Atheros AR7XXX/AR9XXX SoC GPIO API support - * - * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/spinlock.h> -#include <linux/io.h> -#include <linux/ioport.h> -#include <linux/gpio.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -static DEFINE_SPINLOCK(ar71xx_gpio_lock); - -unsigned long ar71xx_gpio_count; -EXPORT_SYMBOL(ar71xx_gpio_count); - -void __ar71xx_gpio_set_value(unsigned gpio, int value) -{ - void __iomem *base = ar71xx_gpio_base; - - if (value) - __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_SET); - else - __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_CLEAR); -} -EXPORT_SYMBOL(__ar71xx_gpio_set_value); - -int __ar71xx_gpio_get_value(unsigned gpio) -{ - return (__raw_readl(ar71xx_gpio_base + AR71XX_GPIO_REG_IN) >> gpio) & 1; -} -EXPORT_SYMBOL(__ar71xx_gpio_get_value); - -static int ar71xx_gpio_get_value(struct gpio_chip *chip, unsigned offset) -{ - return __ar71xx_gpio_get_value(offset); -} - -static void ar71xx_gpio_set_value(struct gpio_chip *chip, - unsigned offset, int value) -{ - __ar71xx_gpio_set_value(offset, value); -} - -static int ar71xx_gpio_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - void __iomem *base = ar71xx_gpio_base; - unsigned long flags; - - spin_lock_irqsave(&ar71xx_gpio_lock, flags); - - __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset), - base + AR71XX_GPIO_REG_OE); - - spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); - - return 0; -} - -static int ar71xx_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - void __iomem *base = ar71xx_gpio_base; - unsigned long flags; - - spin_lock_irqsave(&ar71xx_gpio_lock, flags); - - if (value) - __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET); - else - __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR); - - __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset), - base + AR71XX_GPIO_REG_OE); - - spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); - - return 0; -} - -static int ar934x_gpio_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - void __iomem *base = ar71xx_gpio_base; - unsigned long flags; - - spin_lock_irqsave(&ar71xx_gpio_lock, flags); - - __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset), - base + AR71XX_GPIO_REG_OE); - - spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); - - return 0; -} - -static int ar934x_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - void __iomem *base = ar71xx_gpio_base; - unsigned long flags; - - spin_lock_irqsave(&ar71xx_gpio_lock, flags); - - if (value) - __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET); - else - __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR); - - __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset), - base + AR71XX_GPIO_REG_OE); - - spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); - - return 0; -} - -static struct gpio_chip ar71xx_gpio_chip = { - .label = "ar71xx", - .get = ar71xx_gpio_get_value, - .set = ar71xx_gpio_set_value, - .direction_input = ar71xx_gpio_direction_input, - .direction_output = ar71xx_gpio_direction_output, - .base = 0, - .ngpio = AR71XX_GPIO_COUNT, -}; - -void ar71xx_gpio_function_enable(u32 mask) -{ - void __iomem *base = ar71xx_gpio_base; - unsigned long flags; - unsigned int reg; - - if (ar71xx_soc == AR71XX_SOC_AR9341 || - ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344) { - reg = AR934X_GPIO_REG_FUNC; - } else { - reg = AR71XX_GPIO_REG_FUNC; - } - - spin_lock_irqsave(&ar71xx_gpio_lock, flags); - - __raw_writel(__raw_readl(base + reg) | mask, base + reg); - /* flush write */ - (void) __raw_readl(base + reg); - - spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); -} - -void ar71xx_gpio_function_disable(u32 mask) -{ - void __iomem *base = ar71xx_gpio_base; - unsigned long flags; - unsigned int reg; - - if (ar71xx_soc == AR71XX_SOC_AR9341 || - ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344) { - reg = AR934X_GPIO_REG_FUNC; - } else { - reg = AR71XX_GPIO_REG_FUNC; - } - - spin_lock_irqsave(&ar71xx_gpio_lock, flags); - - __raw_writel(__raw_readl(base + reg) & ~mask, base + reg); - /* flush write */ - (void) __raw_readl(base + reg); - - spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); -} - -void ar71xx_gpio_function_setup(u32 set, u32 clear) -{ - void __iomem *base = ar71xx_gpio_base; - unsigned long flags; - unsigned int reg; - - if (ar71xx_soc == AR71XX_SOC_AR9341 || - ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344) { - reg = AR934X_GPIO_REG_FUNC; - } else { - reg = AR71XX_GPIO_REG_FUNC; - } - - spin_lock_irqsave(&ar71xx_gpio_lock, flags); - - __raw_writel((__raw_readl(base + reg) & ~clear) | set, base + reg); - /* flush write */ - (void) __raw_readl(base + reg); - - spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); -} -EXPORT_SYMBOL(ar71xx_gpio_function_setup); - -void __init ar71xx_gpio_output_select(unsigned gpio, u8 val) -{ - void __iomem *base = ar71xx_gpio_base; - unsigned long flags; - unsigned int reg; - u32 t, s; - - if (ar71xx_soc != AR71XX_SOC_AR9341 && - ar71xx_soc != AR71XX_SOC_AR9342 && - ar71xx_soc != AR71XX_SOC_AR9344) - return; - - if (gpio >= AR934X_GPIO_COUNT) - return; - - reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); - s = 8 * (gpio % 4); - - spin_lock_irqsave(&ar71xx_gpio_lock, flags); - - t = __raw_readl(base + reg); - t &= ~(0xff << s); - t |= val << s; - __raw_writel(t, base + reg); - - /* flush write */ - (void) __raw_readl(base + reg); - - spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); -} - -void __init ar71xx_gpio_init(void) -{ - int err; - - if (!request_mem_region(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE, - "AR71xx GPIO controller")) - panic("cannot allocate AR71xx GPIO registers page"); - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - ar71xx_gpio_chip.ngpio = AR71XX_GPIO_COUNT; - break; - - case AR71XX_SOC_AR7240: - ar71xx_gpio_chip.ngpio = AR7240_GPIO_COUNT; - break; - - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - ar71xx_gpio_chip.ngpio = AR7241_GPIO_COUNT; - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - ar71xx_gpio_chip.ngpio = AR91XX_GPIO_COUNT; - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - ar71xx_gpio_chip.ngpio = AR933X_GPIO_COUNT; - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - ar71xx_gpio_chip.ngpio = AR934X_GPIO_COUNT; - ar71xx_gpio_chip.direction_input = ar934x_gpio_direction_input; - ar71xx_gpio_chip.direction_output = ar934x_gpio_direction_output; - break; - - default: - BUG(); - } - - err = gpiochip_add(&ar71xx_gpio_chip); - if (err) - panic("cannot add AR71xx GPIO chip, error=%d", err); -} - -int gpio_to_irq(unsigned gpio) -{ - return AR71XX_GPIO_IRQ(gpio); -} -EXPORT_SYMBOL(gpio_to_irq); - -int irq_to_gpio(unsigned irq) -{ - return irq - AR71XX_GPIO_IRQ_BASE; -} -EXPORT_SYMBOL(irq_to_gpio); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c deleted file mode 100644 index 6d744daef..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c +++ /dev/null @@ -1,416 +0,0 @@ -/* - * Atheros AR71xx SoC specific interrupt handling - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros 2.6.15 BSP - * Parts of this file are based on Atheros 2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> - -#include <asm/irq_cpu.h> -#include <asm/mipsregs.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -static void ar71xx_gpio_irq_dispatch(void) -{ - void __iomem *base = ar71xx_gpio_base; - u32 pending; - - pending = __raw_readl(base + AR71XX_GPIO_REG_INT_PENDING) & - __raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE); - - if (pending) - do_IRQ(AR71XX_GPIO_IRQ_BASE + fls(pending) - 1); - else - spurious_interrupt(); -} - -static void ar71xx_gpio_irq_unmask(struct irq_data *d) -{ - unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE; - void __iomem *base = ar71xx_gpio_base; - u32 t; - - t = __raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE); - __raw_writel(t | (1 << irq), base + AR71XX_GPIO_REG_INT_ENABLE); - - /* flush write */ - (void) __raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE); -} - -static void ar71xx_gpio_irq_mask(struct irq_data *d) -{ - unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE; - void __iomem *base = ar71xx_gpio_base; - u32 t; - - t = __raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE); - __raw_writel(t & ~(1 << irq), base + AR71XX_GPIO_REG_INT_ENABLE); - - /* flush write */ - (void) __raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE); -} - -static struct irq_chip ar71xx_gpio_irq_chip = { - .name = "AR71XX GPIO", - .irq_unmask = ar71xx_gpio_irq_unmask, - .irq_mask = ar71xx_gpio_irq_mask, - .irq_mask_ack = ar71xx_gpio_irq_mask, -}; - -static struct irqaction ar71xx_gpio_irqaction = { - .handler = no_action, - .name = "cascade [AR71XX GPIO]", -}; - -#define GPIO_INT_ALL 0xffff - -static void __init ar71xx_gpio_irq_init(void) -{ - void __iomem *base = ar71xx_gpio_base; - int i; - - __raw_writel(0, base + AR71XX_GPIO_REG_INT_ENABLE); - __raw_writel(0, base + AR71XX_GPIO_REG_INT_PENDING); - - /* setup type of all GPIO interrupts to level sensitive */ - __raw_writel(GPIO_INT_ALL, base + AR71XX_GPIO_REG_INT_TYPE); - - /* setup polarity of all GPIO interrupts to active high */ - __raw_writel(GPIO_INT_ALL, base + AR71XX_GPIO_REG_INT_POLARITY); - - for (i = AR71XX_GPIO_IRQ_BASE; - i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++) - irq_set_chip_and_handler(i, &ar71xx_gpio_irq_chip, - handle_level_irq); - - setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction); -} - -static void ar71xx_misc_irq_dispatch(void) -{ - u32 pending; - - pending = ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS) - & ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE); - - if (pending & MISC_INT_UART) - do_IRQ(AR71XX_MISC_IRQ_UART); - - else if (pending & MISC_INT_DMA) - do_IRQ(AR71XX_MISC_IRQ_DMA); - - else if (pending & MISC_INT_PERFC) - do_IRQ(AR71XX_MISC_IRQ_PERFC); - - else if (pending & MISC_INT_TIMER) - do_IRQ(AR71XX_MISC_IRQ_TIMER); - - else if (pending & MISC_INT_OHCI) - do_IRQ(AR71XX_MISC_IRQ_OHCI); - - else if (pending & MISC_INT_ERROR) - do_IRQ(AR71XX_MISC_IRQ_ERROR); - - else if (pending & MISC_INT_GPIO) - ar71xx_gpio_irq_dispatch(); - - else if (pending & MISC_INT_WDOG) - do_IRQ(AR71XX_MISC_IRQ_WDOG); - - else if (pending & MISC_INT_TIMER2) - do_IRQ(AR71XX_MISC_IRQ_TIMER2); - - else if (pending & MISC_INT_TIMER3) - do_IRQ(AR71XX_MISC_IRQ_TIMER3); - - else if (pending & MISC_INT_TIMER4) - do_IRQ(AR71XX_MISC_IRQ_TIMER4); - - else if (pending & MISC_INT_DDR_PERF) - do_IRQ(AR71XX_MISC_IRQ_DDR_PERF); - - else if (pending & MISC_INT_ENET_LINK) - do_IRQ(AR71XX_MISC_IRQ_ENET_LINK); - - else - spurious_interrupt(); -} - -static void ar71xx_misc_irq_unmask(struct irq_data *d) -{ - unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE; - void __iomem *base = ar71xx_reset_base; - u32 t; - - t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); - __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); - - /* flush write */ - (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); -} - -static void ar71xx_misc_irq_mask(struct irq_data *d) -{ - unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE; - void __iomem *base = ar71xx_reset_base; - u32 t; - - t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); - __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); - - /* flush write */ - (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); -} - -static void ar724x_misc_irq_ack(struct irq_data *d) -{ - unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE; - void __iomem *base = ar71xx_reset_base; - u32 t; - - t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS); - __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS); - - /* flush write */ - (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS); -} - -static struct irq_chip ar71xx_misc_irq_chip = { - .name = "AR71XX MISC", - .irq_unmask = ar71xx_misc_irq_unmask, - .irq_mask = ar71xx_misc_irq_mask, -}; - -static struct irqaction ar71xx_misc_irqaction = { - .handler = no_action, - .name = "cascade [AR71XX MISC]", -}; - -static void __init ar71xx_misc_irq_init(void) -{ - void __iomem *base = ar71xx_reset_base; - int i; - - __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE); - __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - ar71xx_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; - break; - default: - ar71xx_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; - break; - } - - for (i = AR71XX_MISC_IRQ_BASE; - i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) - irq_set_chip_and_handler(i, &ar71xx_misc_irq_chip, - handle_level_irq); - - setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction); -} - -static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) -{ - u32 status; - - disable_irq_nosync(irq); - - status = ar71xx_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS); - - if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) { - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_PCIE); - generic_handle_irq(AR934X_IP2_IRQ_PCIE); - } else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) { - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_WMAC); - generic_handle_irq(AR934X_IP2_IRQ_WMAC); - } else { - spurious_interrupt(); - } - - enable_irq(irq); -} - -static void ar934x_ip2_irq_init(void) -{ - int i; - - for (i = AR934X_IP2_IRQ_BASE; - i < AR934X_IP2_IRQ_BASE + AR934X_IP2_IRQ_COUNT; i++) - irq_set_chip_and_handler(i, &dummy_irq_chip, - handle_level_irq); - - irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch); -} - - -/* - * The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for - * these devices typically allocate coherent DMA memory, however the - * DMA controller may still have some unsynchronized data in the FIFO. - * Issue a flush in the handlers to ensure that the driver sees - * the update. - */ -static void ar71xx_ip2_handler(void) -{ - ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_PCI); - do_IRQ(AR71XX_CPU_IRQ_IP2); -} - -static void ar724x_ip2_handler(void) -{ - ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE); - do_IRQ(AR71XX_CPU_IRQ_IP2); -} - -static void ar913x_ip2_handler(void) -{ - ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC); - do_IRQ(AR71XX_CPU_IRQ_IP2); -} - -static void ar933x_ip2_handler(void) -{ - ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_WMAC); - do_IRQ(AR71XX_CPU_IRQ_IP2); -} - -static void ar934x_ip2_handler(void) -{ - do_IRQ(AR71XX_CPU_IRQ_IP2); -} - -static void ar71xx_ip3_handler(void) -{ - ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_USB); - do_IRQ(AR71XX_CPU_IRQ_USB); -} - -static void ar724x_ip3_handler(void) -{ - ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_USB); - do_IRQ(AR71XX_CPU_IRQ_USB); -} - -static void ar913x_ip3_handler(void) -{ - ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_USB); - do_IRQ(AR71XX_CPU_IRQ_USB); -} - -static void ar933x_ip3_handler(void) -{ - ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_USB); - do_IRQ(AR71XX_CPU_IRQ_USB); -} - -static void ar934x_ip3_handler(void) -{ - do_IRQ(AR71XX_CPU_IRQ_USB); -} - -static void (*ip2_handler)(void); -static void (*ip3_handler)(void); - -asmlinkage void plat_irq_dispatch(void) -{ - unsigned long pending; - - pending = read_c0_status() & read_c0_cause() & ST0_IM; - - if (pending & STATUSF_IP7) - do_IRQ(AR71XX_CPU_IRQ_TIMER); - - else if (pending & STATUSF_IP2) - ip2_handler(); - - else if (pending & STATUSF_IP4) - do_IRQ(AR71XX_CPU_IRQ_GE0); - - else if (pending & STATUSF_IP5) - do_IRQ(AR71XX_CPU_IRQ_GE1); - - else if (pending & STATUSF_IP3) - ip3_handler(); - - else if (pending & STATUSF_IP6) - ar71xx_misc_irq_dispatch(); - - else - spurious_interrupt(); -} - -void __init arch_init_irq(void) -{ - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - ip2_handler = ar71xx_ip2_handler; - ip3_handler = ar71xx_ip3_handler; - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - ip2_handler = ar724x_ip2_handler; - ip3_handler = ar724x_ip3_handler; - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - ip2_handler = ar913x_ip2_handler; - ip3_handler = ar913x_ip3_handler; - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - ip2_handler = ar933x_ip2_handler; - ip3_handler = ar933x_ip3_handler; - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - ip2_handler = ar934x_ip2_handler; - ip3_handler = ar934x_ip3_handler; - break; - - default: - BUG(); - } - - mips_cpu_irq_init(); - - ar71xx_misc_irq_init(); - - if (ar71xx_soc == AR71XX_SOC_AR9341 || - ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344) - ar934x_ip2_irq_init(); - - cp0_perfcount_irq = AR71XX_MISC_IRQ_PERFC; - - ar71xx_gpio_irq_init(); -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-alfa-ap96.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-alfa-ap96.c deleted file mode 100644 index f22db50a5..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-alfa-ap96.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * ALFA Network AP96 board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/bitops.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/mmc/host.h> -#include <linux/spi/spi.h> -#include <linux/spi/mmc_spi.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-pb42-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-usb.h" - -#define ALFA_AP96_GPIO_MICROSD_CS 0 -#define ALFA_AP96_GPIO_RTC_CS 1 -#define ALFA_AP96_GPIO_PCIE_RESET 2 -#define ALFA_AP96_GPIO_SIM_DETECT 3 -#define ALFA_AP96_GPIO_MICROSD_CD 4 -#define ALFA_AP96_GPIO_PCIE_W_DISABLE 5 - -#define ALFA_AP96_GPIO_BUTTON_RESET 11 - -#define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL) - -static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALFA_AP96_GPIO_BUTTON_RESET, - .active_low = 1, - } -}; - -static int alfa_ap96_mmc_get_cd(struct device *dev) -{ - return !gpio_get_value(ALFA_AP96_GPIO_MICROSD_CD); -} - -static struct mmc_spi_platform_data alfa_ap96_mmc_data = { - .get_cd = alfa_ap96_mmc_get_cd, - .caps = MMC_CAP_NEEDS_POLL, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct spi_board_info alfa_ap96_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - }, { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "mmc_spi", - .platform_data = &alfa_ap96_mmc_data, - .controller_data = (void *) ALFA_AP96_GPIO_MICROSD_CS, - }, { - .bus_num = 0, - .chip_select = 2, - .max_speed_hz = 6250000, - .modalias = "rtc-pcf2123", - .controller_data = (void *) ALFA_AP96_GPIO_RTC_CS, - }, -}; - -static struct resource alfa_ap96_spi_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct ar71xx_spi_platform_data alfa_ap96_spi_data = { - .bus_num = 0, - .num_chipselect = 3, -}; - -static struct platform_device alfa_ap96_spi_device = { - .name = "pb44-spi", - .id = -1, - .resource = alfa_ap96_spi_resources, - .num_resources = ARRAY_SIZE(alfa_ap96_spi_resources), - .dev = { - .platform_data = &alfa_ap96_spi_data, - }, -}; - -static void __init alfa_ap96_gpio_setup(void) -{ - ar71xx_gpio_function_disable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD"); - gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD); - gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset"); - gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1); - gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable"); - gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1); -} - -#define ALFA_AP96_WAN_PHYMASK BIT(4) -#define ALFA_AP96_LAN_PHYMASK BIT(5) -#define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK) - -static void __init alfa_ap96_init(void) -{ - alfa_ap96_gpio_setup(); - - ar71xx_add_device_mdio(0, ~ALFA_AP96_MDIO_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK; - ar71xx_eth1_pll_data.pll_1000 = 0x110000; - - ar71xx_add_device_eth(0); - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK; - ar71xx_eth1_pll_data.pll_1000 = 0x110000; - - ar71xx_add_device_eth(1); - - pb42_pci_init(); - - spi_register_board_info(alfa_ap96_spi_info, - ARRAY_SIZE(alfa_ap96_spi_info)); - platform_device_register(&alfa_ap96_spi_device); - - ar71xx_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL, - ARRAY_SIZE(alfa_ap96_gpio_keys), - alfa_ap96_gpio_keys); - ar71xx_add_device_usb(); -} - -MIPS_MACHINE(AR71XX_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96", - alfa_ap96_init); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-alfa-nx.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-alfa-nx.c deleted file mode 100644 index 6e28080a8..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-alfa-nx.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * ALFA Network N2/N5 board support - * - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define ALFA_NX_GPIO_LED_2 17 -#define ALFA_NX_GPIO_LED_3 16 -#define ALFA_NX_GPIO_LED_5 12 -#define ALFA_NX_GPIO_LED_6 8 -#define ALFA_NX_GPIO_LED_7 6 -#define ALFA_NX_GPIO_LED_8 7 - -#define ALFA_NX_GPIO_BTN_RESET 11 - -#define ALFA_NX_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALFA_NX_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_NX_KEYS_POLL_INTERVAL) - -#define ALFA_NX_MAC0_OFFSET 0 -#define ALFA_NX_MAC1_OFFSET 6 -#define ALFA_NX_CALDATA_OFFSET 0x1000 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition alfa_nx_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x600000, - }, { - .name = "kernel", - .offset = 0x650000, - .size = 0x190000, - }, { - .name = "nvram", - .offset = 0x7e0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x780000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data alfa_nx_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = alfa_nx_partitions, - .nr_parts = ARRAY_SIZE(alfa_nx_partitions), -#endif -}; - -static struct gpio_keys_button alfa_nx_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALFA_NX_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALFA_NX_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct gpio_led alfa_nx_leds_gpio[] __initdata = { - { - .name = "alfa:green:led_2", - .gpio = ALFA_NX_GPIO_LED_2, - .active_low = 1, - }, { - .name = "alfa:green:led_3", - .gpio = ALFA_NX_GPIO_LED_3, - .active_low = 1, - }, { - .name = "alfa:red:led_5", - .gpio = ALFA_NX_GPIO_LED_5, - .active_low = 1, - }, { - .name = "alfa:amber:led_6", - .gpio = ALFA_NX_GPIO_LED_6, - .active_low = 1, - }, { - .name = "alfa:green:led_7", - .gpio = ALFA_NX_GPIO_LED_7, - .active_low = 1, - }, { - .name = "alfa:green:led_8", - .gpio = ALFA_NX_GPIO_LED_8, - .active_low = 1, - } -}; - -static void __init alfa_nx_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, - AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ar71xx_add_device_m25p80(&alfa_nx_flash_data); - - ar71xx_add_device_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio), - alfa_nx_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL, - ARRAY_SIZE(alfa_nx_gpio_keys), - alfa_nx_gpio_keys); - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, - art + ALFA_NX_MAC0_OFFSET, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, - art + ALFA_NX_MAC1_OFFSET, 0); - - /* WAN port */ - ar71xx_add_device_eth(0); - /* LAN port */ - ar71xx_add_device_eth(1); - - ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL); -} - -MIPS_MACHINE(AR71XX_MACH_ALFA_NX, "ALFA-NX", "ALFA Network N2/N5", - alfa_nx_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-all0258n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-all0258n.c deleted file mode 100644 index 18d0a93a9..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-all0258n.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Allnet ALL0258N support - * - * Copyright (C) 2011 Daniel Golle <dgolle@allnet.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -/* found via /sys/gpio/... try and error */ -#define ALL0258N_GPIO_BTN_RESET 1 -#define ALL0258N_GPIO_LED_RSSIHIGH 13 -#define ALL0258N_GPIO_LED_RSSIMEDIUM 15 -#define ALL0258N_GPIO_LED_RSSILOW 14 - -/* defaults taken from others machs */ -#define ALL0258N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALL0258N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0258N_KEYS_POLL_INTERVAL) - -/* showed up in the original firmware's bootlog */ -#define ALL0258N_SEC_PHYMASK BIT(3) - -/* - * from U-Boot bootargs of original firmware: - * mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),320k(custom),1024k(kernel),4928k(rootfs),1536k(failsafe),64k(ART) - * we use a more OpenWrt-friendly layout now: - * mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),896k(kernel),5376k(rootfs),1536k(failsafe),64k(ART) - */ -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition all0258n_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x050000, - .size = 0x0E0000, - }, { - .name = "rootfs", - .offset = 0x130000, - .size = 0x540000, - }, { - .name = "failsafe", - .offset = 0x670000, - .size = 0x180000, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x620000, - }, { - .name = "art", - .offset = 0x7F0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data all0258n_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = all0258n_partitions, - .nr_parts = ARRAY_SIZE(all0258n_partitions), -#endif -}; - -static struct gpio_led all0258n_leds_gpio[] __initdata = { - { - .name = "all0258n:green:rssihigh", - .gpio = ALL0258N_GPIO_LED_RSSIHIGH, - .active_low = 1, - }, { - .name = "all0258n:yellow:rssimedium", - .gpio = ALL0258N_GPIO_LED_RSSIMEDIUM, - .active_low = 1, - }, { - .name = "all0258n:red:rssilow", - .gpio = ALL0258N_GPIO_LED_RSSILOW, - .active_low = 1, - } -}; - -static struct gpio_keys_button all0258n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALL0258N_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALL0258N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init all0258n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f7f0000); - u8 *ee = (u8 *) KSEG1ADDR(0x1f7f1000); - - ar71xx_add_device_m25p80(&all0258n_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(all0258n_leds_gpio), - all0258n_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, ALL0258N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(all0258n_gpio_keys), - all0258n_gpio_keys); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 0); - - ar71xx_eth1_data.phy_mask = ALL0258N_SEC_PHYMASK; - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(AR71XX_MACH_ALL0258N, "ALL0258N", "Allnet ALL0258N", - all0258n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap121.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap121.c deleted file mode 100644 index d14996f59..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap121.c +++ /dev/null @@ -1,237 +0,0 @@ -/* - * Atheros AP121 board support - * - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/spi/flash.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" - -#define AP121_GPIO_LED_WLAN 0 -#define AP121_GPIO_LED_USB 1 - -#define AP121_GPIO_BTN_JUMPSTART 11 -#define AP121_GPIO_BTN_RESET 12 - -#define AP121_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL) - -#define AP121_MAC0_OFFSET 0x0000 -#define AP121_MAC1_OFFSET 0x0006 -#define AP121_CALDATA_OFFSET 0x1000 -#define AP121_WMAC_MAC_OFFSET 0x1002 - -#define AP121_MINI_GPIO_LED_WLAN 0 -#define AP121_MINI_GPIO_BTN_JUMPSTART 12 -#define AP121_MINI_GPIO_BTN_RESET 11 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition ap121_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "rootfs", - .offset = 0x010000, - .size = 0x130000, - }, - { - .name = "uImage", - .offset = 0x140000, - .size = 0x0a0000, - }, - { - .name = "NVRAM", - .offset = 0x1e0000, - .size = 0x010000, - }, - { - .name = "ART", - .offset = 0x1f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, -}; -#define ap121_nr_parts ARRAY_SIZE(ap121_parts) - -static struct mtd_partition ap121_mini_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "rootfs", - .offset = 0x050000, - .size = 0x2b0000, - }, - { - .name = "uImage", - .offset = 0x300000, - .size = 0x0e0000, - }, - { - .name = "NVRAM", - .offset = 0x3e0000, - .size = 0x010000, - }, - { - .name = "ART", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, -}; - -#define ap121_mini_nr_parts ARRAY_SIZE(ap121_parts) - -#else -#define ap121_parts NULL -#define ap121_nr_parts 0 -#define ap121_mini_parts NULL -#define ap121_mini_nr_parts 0 -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data ap121_flash_data = { - .parts = ap121_parts, - .nr_parts = ap121_nr_parts, -}; - -static struct gpio_led ap121_leds_gpio[] __initdata = { - { - .name = "ap121:green:usb", - .gpio = AP121_GPIO_LED_USB, - .active_low = 0, - }, - { - .name = "ap121:green:wlan", - .gpio = AP121_GPIO_LED_WLAN, - .active_low = 0, - }, -}; - -static struct gpio_keys_button ap121_gpio_keys[] __initdata = { - { - .desc = "jumpstart button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP121_GPIO_BTN_JUMPSTART, - .active_low = 1, - }, - { - .desc = "reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP121_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct gpio_led ap121_mini_leds_gpio[] __initdata = { - { - .name = "ap121:green:wlan", - .gpio = AP121_MINI_GPIO_LED_WLAN, - .active_low = 0, - }, -}; - -static struct gpio_keys_button ap121_mini_gpio_keys[] __initdata = { - { - .desc = "jumpstart button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP121_MINI_GPIO_BTN_JUMPSTART, - .active_low = 1, - }, - { - .desc = "reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP121_MINI_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init ap121_common_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ar71xx_add_device_m25p80(&ap121_flash_data); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, art + AP121_MAC0_OFFSET, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, art + AP121_MAC1_OFFSET, 0); - - ar71xx_add_device_mdio(0, 0x0); - - /* LAN ports */ - ar71xx_add_device_eth(1); - - /* WAN port */ - ar71xx_add_device_eth(0); - - ar9xxx_add_device_wmac(art + AP121_CALDATA_OFFSET, - art + AP121_WMAC_MAC_OFFSET); -} - -static void __init ap121_setup(void) -{ - ap121_flash_data.parts = ap121_parts; - ap121_flash_data.nr_parts = ap121_nr_parts; - - ap121_common_setup(); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio), - ap121_leds_gpio); - ar71xx_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap121_gpio_keys), - ap121_gpio_keys); - - ar71xx_add_device_usb(); -} - -static void __init ap121_mini_setup(void) -{ - ap121_flash_data.parts = ap121_mini_parts; - ap121_flash_data.nr_parts = ap121_mini_nr_parts; - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap121_mini_leds_gpio), - ap121_mini_leds_gpio); - ar71xx_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap121_mini_gpio_keys), - ap121_mini_gpio_keys); - - ap121_common_setup(); -} - -MIPS_MACHINE(AR71XX_MACH_AP121, "AP121", "Atheros AP121", - ap121_setup); - -MIPS_MACHINE(AR71XX_MACH_AP121_MINI, "AP121-MINI", "Atheros AP121-MINI", - ap121_mini_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap81.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap81.c deleted file mode 100644 index 802dbec0c..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap81.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Atheros AP81 board support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define AP81_GPIO_LED_STATUS 1 -#define AP81_GPIO_LED_AOSS 3 -#define AP81_GPIO_LED_WLAN 6 -#define AP81_GPIO_LED_POWER 14 - -#define AP81_GPIO_BTN_SW4 12 -#define AP81_GPIO_BTN_SW1 21 - -#define AP81_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP81_KEYS_DEBOUNCE_INTERVAL (3 * AP81_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition ap81_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x500000, - }, { - .name = "uImage", - .offset = 0x550000, - .size = 0x100000, - }, { - .name = "ART", - .offset = 0x650000, - .size = 0x1b0000, - .mask_flags = MTD_WRITEABLE, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data ap81_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = ap81_partitions, - .nr_parts = ARRAY_SIZE(ap81_partitions), -#endif -}; - -static struct gpio_led ap81_leds_gpio[] __initdata = { - { - .name = "ap81:green:status", - .gpio = AP81_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "ap81:amber:aoss", - .gpio = AP81_GPIO_LED_AOSS, - .active_low = 1, - }, { - .name = "ap81:green:wlan", - .gpio = AP81_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "ap81:green:power", - .gpio = AP81_GPIO_LED_POWER, - .active_low = 1, - } -}; - -static struct gpio_keys_button ap81_gpio_keys[] __initdata = { - { - .desc = "sw1", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP81_GPIO_BTN_SW1, - .active_low = 1, - }, { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP81_GPIO_BTN_SW4, - .active_low = 1, - } -}; - -static void __init ap81_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.has_ar8216 = 1; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = 0x10; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_usb(); - - ar71xx_add_device_m25p80(&ap81_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio), - ap81_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap81_gpio_keys), - ap81_gpio_keys); - - ar9xxx_add_device_wmac(eeprom, NULL); -} - -MIPS_MACHINE(AR71XX_MACH_AP81, "AP81", "Atheros AP81", ap81_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap83.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap83.c deleted file mode 100644 index 2eab99455..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap83.c +++ /dev/null @@ -1,267 +0,0 @@ -/* - * Atheros AP83 board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/spi/spi.h> -#include <linux/spi/spi_gpio.h> -#include <linux/spi/vsc7385.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/ar91xx_flash.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define AP83_GPIO_LED_WLAN 6 -#define AP83_GPIO_LED_POWER 14 -#define AP83_GPIO_LED_JUMPSTART 15 -#define AP83_GPIO_BTN_JUMPSTART 12 -#define AP83_GPIO_BTN_RESET 21 - -#define AP83_050_GPIO_VSC7385_CS 1 -#define AP83_050_GPIO_VSC7385_MISO 3 -#define AP83_050_GPIO_VSC7385_MOSI 16 -#define AP83_050_GPIO_VSC7385_SCK 17 - -#define AP83_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP83_KEYS_DEBOUNCE_INTERVAL (3 * AP83_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition ap83_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x060000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x1a0000, - .size = 0x650000, - }, { - .name = "art", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x060000, - .size = 0x790000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct ar91xx_flash_platform_data ap83_flash_data = { - .width = 2, -#ifdef CONFIG_MTD_PARTITIONS - .parts = ap83_flash_partitions, - .nr_parts = ARRAY_SIZE(ap83_flash_partitions), -#endif -}; - -static struct resource ap83_flash_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device ap83_flash_device = { - .name = "ar91xx-flash", - .id = -1, - .resource = ap83_flash_resources, - .num_resources = ARRAY_SIZE(ap83_flash_resources), - .dev = { - .platform_data = &ap83_flash_data, - } -}; - -static struct gpio_led ap83_leds_gpio[] __initdata = { - { - .name = "ap83:green:jumpstart", - .gpio = AP83_GPIO_LED_JUMPSTART, - .active_low = 0, - }, { - .name = "ap83:green:power", - .gpio = AP83_GPIO_LED_POWER, - .active_low = 0, - }, { - .name = "ap83:green:wlan", - .gpio = AP83_GPIO_LED_WLAN, - .active_low = 0, - }, -}; - -static struct gpio_keys_button ap83_gpio_keys[] __initdata = { - { - .desc = "soft_reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP83_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "jumpstart", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP83_GPIO_BTN_JUMPSTART, - .active_low = 1, - } -}; - -static struct resource ap83_040_spi_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device ap83_040_spi_device = { - .name = "ap83-spi", - .id = 0, - .resource = ap83_040_spi_resources, - .num_resources = ARRAY_SIZE(ap83_040_spi_resources), -}; - -static struct spi_gpio_platform_data ap83_050_spi_data = { - .miso = AP83_050_GPIO_VSC7385_MISO, - .mosi = AP83_050_GPIO_VSC7385_MOSI, - .sck = AP83_050_GPIO_VSC7385_SCK, - .num_chipselect = 1, -}; - -static struct platform_device ap83_050_spi_device = { - .name = "spi_gpio", - .id = 0, - .dev = { - .platform_data = &ap83_050_spi_data, - } -}; - -static void ap83_vsc7385_reset(void) -{ - ar71xx_device_stop(RESET_MODULE_GE1_PHY); - udelay(10); - ar71xx_device_start(RESET_MODULE_GE1_PHY); - mdelay(50); -} - -static struct vsc7385_platform_data ap83_vsc7385_data = { - .reset = ap83_vsc7385_reset, - .ucode_name = "vsc7385_ucode_ap83.bin", - .mac_cfg = { - .tx_ipg = 6, - .bit2 = 0, - .clk_sel = 3, - }, -}; - -static struct spi_board_info ap83_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "spi-vsc7385", - .platform_data = &ap83_vsc7385_data, - .controller_data = (void *) AP83_050_GPIO_VSC7385_CS, - } -}; - -static void __init ap83_generic_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_mdio(0, 0xfffffffe); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.phy_mask = 0x1; - - ar71xx_add_device_eth(0); - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.speed = SPEED_1000; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - - ar71xx_eth1_pll_data.pll_1000 = 0x1f000000; - - ar71xx_add_device_eth(1); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap83_leds_gpio), - ap83_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, AP83_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap83_gpio_keys), - ap83_gpio_keys); - - ar71xx_add_device_usb(); - - ar9xxx_add_device_wmac(eeprom, NULL); - - platform_device_register(&ap83_flash_device); - - spi_register_board_info(ap83_spi_info, ARRAY_SIZE(ap83_spi_info)); -} - -static void __init ap83_040_setup(void) -{ - ap83_flash_data.is_shared = 1; - ap83_generic_setup(); - platform_device_register(&ap83_040_spi_device); -} - -static void __init ap83_050_setup(void) -{ - ap83_generic_setup(); - platform_device_register(&ap83_050_spi_device); -} - -static void __init ap83_setup(void) -{ - u8 *board_id = (u8 *) KSEG1ADDR(0x1fff1244); - unsigned int board_version; - - board_version = (unsigned int)(board_id[0] - '0'); - board_version += ((unsigned int)(board_id[1] - '0')) * 10; - - switch (board_version) { - case 40: - ap83_040_setup(); - break; - case 50: - ap83_050_setup(); - break; - default: - printk(KERN_WARNING "AP83-%03u board is not yet supported\n", - board_version); - } -} - -MIPS_MACHINE(AR71XX_MACH_AP83, "AP83", "Atheros AP83", ap83_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap96.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap96.c deleted file mode 100644 index 5882af29f..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap96.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Atheros AP96 board support - * - * Copyright (C) 2009 Marco Porsch - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2010 Atheros Communications - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/delay.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap94-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define AP96_GPIO_LED_12_GREEN 0 -#define AP96_GPIO_LED_3_GREEN 1 -#define AP96_GPIO_LED_2_GREEN 2 -#define AP96_GPIO_LED_WPS_GREEN 4 -#define AP96_GPIO_LED_5_GREEN 5 -#define AP96_GPIO_LED_4_ORANGE 6 - -/* Reset button - next to the power connector */ -#define AP96_GPIO_BTN_RESET 3 -/* WPS button - next to a led on right */ -#define AP96_GPIO_BTN_WPS 8 - -#define AP96_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL) - -#define AP96_WMAC0_MAC_OFFSET 0x120c -#define AP96_WMAC1_MAC_OFFSET 0x520c -#define AP96_CALDATA0_OFFSET 0x1000 -#define AP96_CALDATA1_OFFSET 0x5000 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition ap96_partitions[] = { - { - .name = "uboot", - .offset = 0, - .size = 0x030000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "env", - .offset = 0x030000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "rootfs", - .offset = 0x040000, - .size = 0x600000, - }, { - .name = "uImage", - .offset = 0x640000, - .size = 0x1b0000, - }, { - .name = "caldata", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data ap96_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = ap96_partitions, - .nr_parts = ARRAY_SIZE(ap96_partitions), -#endif -}; - -/* - * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12 - * below (from left to right on the board). Led 1 seems to be on whenever the - * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange; - * others are green. - * - * In addition, there is one led next to a button on the right side for WPS. - */ -static struct gpio_led ap96_leds_gpio[] __initdata = { - { - .name = "ap96:green:led2", - .gpio = AP96_GPIO_LED_2_GREEN, - .active_low = 1, - }, { - .name = "ap96:green:led3", - .gpio = AP96_GPIO_LED_3_GREEN, - .active_low = 1, - }, { - .name = "ap96:orange:led4", - .gpio = AP96_GPIO_LED_4_ORANGE, - .active_low = 1, - }, { - .name = "ap96:green:led5", - .gpio = AP96_GPIO_LED_5_GREEN, - .active_low = 1, - }, { - .name = "ap96:green:led12", - .gpio = AP96_GPIO_LED_12_GREEN, - .active_low = 1, - }, { /* next to a button on right */ - .name = "ap96:green:wps", - .gpio = AP96_GPIO_LED_WPS_GREEN, - .active_low = 1, - } -}; - -static struct gpio_keys_button ap96_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP96_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP96_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -#define AP96_WAN_PHYMASK 0x10 -#define AP96_LAN_PHYMASK 0x0f - -static void __init ap96_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ar71xx_add_device_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK)); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, art, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.phy_mask = AP96_LAN_PHYMASK; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, art, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = AP96_WAN_PHYMASK; - - ar71xx_eth1_pll_data.pll_1000 = 0x1f000000; - - ar71xx_add_device_eth(1); - - ar71xx_add_device_usb(); - - ar71xx_add_device_m25p80(&ap96_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio), - ap96_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap96_gpio_keys), - ap96_gpio_keys); - - ap94_pci_init(art + AP96_CALDATA0_OFFSET, - art + AP96_WMAC0_MAC_OFFSET, - art + AP96_CALDATA1_OFFSET, - art + AP96_WMAC1_MAC_OFFSET); -} - -MIPS_MACHINE(AR71XX_MACH_AP96, "AP96", "Atheros AP96", ap96_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-aw-nr580.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-aw-nr580.c deleted file mode 100644 index 54dc96c71..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-aw-nr580.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * AzureWave AW-NR580 board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mips_machine.h> -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-pb42-pci.h" -#include "dev-leds-gpio.h" - -#define AW_NR580_GPIO_LED_READY_RED 0 -#define AW_NR580_GPIO_LED_WLAN 1 -#define AW_NR580_GPIO_LED_READY_GREEN 2 -#define AW_NR580_GPIO_LED_WPS_GREEN 4 -#define AW_NR580_GPIO_LED_WPS_AMBER 5 - -#define AW_NR580_GPIO_BTN_WPS 3 -#define AW_NR580_GPIO_BTN_RESET 11 - -#define AW_NR580_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AW_NR580_KEYS_DEBOUNCE_INTERVAL (3 * AW_NR580_KEYS_POLL_INTERVAL) - -static struct gpio_led aw_nr580_leds_gpio[] __initdata = { - { - .name = "aw-nr580:red:ready", - .gpio = AW_NR580_GPIO_LED_READY_RED, - .active_low = 0, - }, { - .name = "aw-nr580:green:ready", - .gpio = AW_NR580_GPIO_LED_READY_GREEN, - .active_low = 0, - }, { - .name = "aw-nr580:green:wps", - .gpio = AW_NR580_GPIO_LED_WPS_GREEN, - .active_low = 0, - }, { - .name = "aw-nr580:amber:wps", - .gpio = AW_NR580_GPIO_LED_WPS_AMBER, - .active_low = 0, - }, { - .name = "aw-nr580:green:wlan", - .gpio = AW_NR580_GPIO_LED_WLAN, - .active_low = 0, - } -}; - -static struct gpio_keys_button aw_nr580_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, - .gpio = AW_NR580_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, - .gpio = AW_NR580_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static const char *aw_nr580_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data aw_nr580_flash_data = { - .part_probes = aw_nr580_part_probes, -}; - -static void __init aw_nr580_setup(void) -{ - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - - pb42_pci_init(); - - ar71xx_add_device_m25p80(&aw_nr580_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(aw_nr580_leds_gpio), - aw_nr580_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, AW_NR580_KEYS_POLL_INTERVAL, - ARRAY_SIZE(aw_nr580_gpio_keys), - aw_nr580_gpio_keys); -} - -MIPS_MACHINE(AR71XX_MACH_AW_NR580, "AW-NR580", "AzureWave AW-NR580", - aw_nr580_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-db120.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-db120.c deleted file mode 100644 index 3a95fa26d..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-db120.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * Atheros DB120 board (WASP SoC) support - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-db120-pci.h" - -#define DB120_GPIO_LED_USB 11 -#define DB120_GPIO_LED_WLAN_5G 12 -#define DB120_GPIO_LED_WLAN_2G 13 -#define DB120_GPIO_LED_STATUS 14 -#define DB120_GPIO_LED_WPS 15 - -#define DB120_GPIO_BTN_WPS 16 - -#define DB120_MAC0_OFFSET 0 -#define DB120_MAC1_OFFSET 6 -#define DB120_WMAC_CALDATA_OFFSET 0x1000 -#define DB120_PCIE_CALDATA_OFFSET 0x5000 - -#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition db120_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x630000, - }, { - .name = "uImage", - .offset = 0x680000, - .size = 0x160000, - }, { - .name = "NVRAM", - .offset = 0x7E0000, - .size = 0x010000, - }, { - .name = "ART", - .offset = 0x7F0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data db120_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = db120_partitions, - .nr_parts = ARRAY_SIZE(db120_partitions), -#endif -}; - -static struct gpio_led db120_leds_gpio[] __initdata = { - { - .name = "db120:green:status", - .gpio = DB120_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "db120:green:wps", - .gpio = DB120_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "db120:green:wlan-5g", - .gpio = DB120_GPIO_LED_WLAN_5G, - .active_low = 1, - }, { - .name = "db120:green:wlan-2g", - .gpio = DB120_GPIO_LED_WLAN_2G, - .active_low = 1, - }, { - .name = "db120:green:usb", - .gpio = DB120_GPIO_LED_USB, - .active_low = 1, - } -}; - -static struct gpio_keys_button db120_gpio_keys[] __initdata = { - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL, - .gpio = DB120_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init db120_gmac_setup(void) -{ - void __iomem *base; - u32 t; - - base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE); - - t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); - t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 | - AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE); - __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG); - - iounmap(base); -} - -static void __init db120_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ar71xx_gpio_output_select(DB120_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO); - - ar71xx_add_device_usb(); - - ar71xx_add_device_m25p80(&db120_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), - db120_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, - ARRAY_SIZE(db120_gpio_keys), - db120_gpio_keys); - - db120_gmac_setup(); - - ar71xx_add_device_mdio(0, 0x0); - ar71xx_add_device_mdio(1, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, art + DB120_MAC0_OFFSET, 0); -#if 0 - /* GMAC0 is connected to an AR8327 switch */ - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; -#else - /* GMAC0 is connected to PHY4 of the internal switch */ - ar71xx_switch_data.phy4_mii_en = 1; - - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = BIT(4); - ar71xx_eth0_data.mii_bus_dev = &ar71xx_mdio1_device.dev; -#endif - - ar71xx_add_device_eth(0); - - /* GMAC1 is connected to the internal switch */ - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, art + DB120_MAC1_OFFSET, 0); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ar71xx_eth1_data.speed = SPEED_1000; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(1); - - ar9xxx_add_device_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); - - db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL); -} - -MIPS_MACHINE(AR71XX_MACH_DB120, "DB120", "Atheros DB120", db120_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-600-a1.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-600-a1.c deleted file mode 100644 index ba833e8f7..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-600-a1.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * D-Link DIR-600 rev. A1 board support - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "nvram.h" - -#define DIR_600_A1_GPIO_LED_WPS 0 -#define DIR_600_A1_GPIO_LED_POWER_AMBER 1 -#define DIR_600_A1_GPIO_LED_POWER_GREEN 6 - -#define DIR_600_A1_GPIO_BTN_RESET 8 -#define DIR_600_A1_GPIO_BTN_WPS 12 - -#define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL) - -#define DIR_600_A1_NVRAM_ADDR 0x1f030000 -#define DIR_600_A1_NVRAM_SIZE 0x10000 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition dir_600_a1_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x030000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "nvram", - .offset = 0x030000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x040000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x120000, - .size = 0x2c0000, - }, { - .name = "mac", - .offset = 0x3e0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x040000, - .size = 0x3a0000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data dir_600_a1_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = dir_600_a1_partitions, - .nr_parts = ARRAY_SIZE(dir_600_a1_partitions), -#endif -}; - -static struct gpio_led dir_600_a1_leds_gpio[] __initdata = { - { - .name = "dir-600-a1:green:power", - .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN, - }, { - .name = "dir-600-a1:amber:power", - .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER, - }, { - .name = "dir-600-a1:blue:wps", - .gpio = DIR_600_A1_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_600_A1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_600_A1_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init dir_600_a1_setup(void) -{ - const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac_buff[6]; - u8 *mac = NULL; - - if (nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE, - "lan_mac=", mac_buff) == 0) { - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac_buff, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac_buff, 1); - mac = mac_buff; - } - - ar71xx_add_device_m25p80(&dir_600_a1_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio), - dir_600_a1_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir_600_a1_gpio_keys), - dir_600_a1_gpio_keys); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); - - ar71xx_add_device_mdio(0, 0x0); - - /* LAN ports */ - ar71xx_add_device_eth(1); - - /* WAN port */ - ar71xx_add_device_eth(0); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(AR71XX_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1", - dir_600_a1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-615-c1.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-615-c1.c deleted file mode 100644 index fcadc6f06..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-615-c1.c +++ /dev/null @@ -1,175 +0,0 @@ -/* - * D-Link DIR-615 rev C1 board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "nvram.h" - -#define DIR_615C1_GPIO_LED_ORANGE_STATUS 1 /* ORANGE:STATUS:TRICOLOR */ -#define DIR_615C1_GPIO_LED_BLUE_WPS 3 /* BLUE:WPS */ -#define DIR_615C1_GPIO_LED_GREEN_WAN 4 /* GREEN:WAN:TRICOLOR */ -#define DIR_615C1_GPIO_LED_GREEN_WANCPU 5 /* GREEN:WAN:CPU:TRICOLOR */ -#define DIR_615C1_GPIO_LED_GREEN_WLAN 6 /* GREEN:WLAN */ -#define DIR_615C1_GPIO_LED_GREEN_STATUS 14 /* GREEN:STATUS:TRICOLOR */ -#define DIR_615C1_GPIO_LED_ORANGE_WAN 15 /* ORANGE:WAN:TRICOLOR */ - -/* buttons may need refinement */ - -#define DIR_615C1_GPIO_BTN_WPS 12 -#define DIR_615C1_GPIO_BTN_RESET 21 - -#define DIR_615C1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL) - -#define DIR_615C1_CONFIG_ADDR 0x1f020000 -#define DIR_615C1_CONFIG_SIZE 0x10000 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition dir_615c1_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "config", - .offset = 0x020000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x030000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x110000, - .size = 0x2e0000, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x030000, - .size = 0x3c0000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data dir_615c1_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = dir_615c1_partitions, - .nr_parts = ARRAY_SIZE(dir_615c1_partitions), -#endif -}; - -static struct gpio_led dir_615c1_leds_gpio[] __initdata = { - { - .name = "dir-615c1:orange:status", - .gpio = DIR_615C1_GPIO_LED_ORANGE_STATUS, - .active_low = 1, - }, { - .name = "dir-615c1:blue:wps", - .gpio = DIR_615C1_GPIO_LED_BLUE_WPS, - .active_low = 1, - }, { - .name = "dir-615c1:green:wan", - .gpio = DIR_615C1_GPIO_LED_GREEN_WAN, - .active_low = 1, - }, { - .name = "dir-615c1:green:wancpu", - .gpio = DIR_615C1_GPIO_LED_GREEN_WANCPU, - .active_low = 1, - }, { - .name = "dir-615c1:green:wlan", - .gpio = DIR_615C1_GPIO_LED_GREEN_WLAN, - .active_low = 1, - }, { - .name = "dir-615c1:green:status", - .gpio = DIR_615C1_GPIO_LED_GREEN_STATUS, - .active_low = 1, - }, { - .name = "dir-615c1:orange:wan", - .gpio = DIR_615C1_GPIO_LED_ORANGE_WAN, - .active_low = 1, - } - -}; - -static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_615C1_GPIO_BTN_RESET, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_615C1_GPIO_BTN_WPS, - } -}; - -#define DIR_615C1_LAN_PHYMASK BIT(0) -#define DIR_615C1_WAN_PHYMASK BIT(4) -#define DIR_615C1_MDIO_MASK (~(DIR_615C1_LAN_PHYMASK | \ - DIR_615C1_WAN_PHYMASK)) - -static void __init dir_615c1_setup(void) -{ - const char *config = (char *) KSEG1ADDR(DIR_615C1_CONFIG_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - u8 *wlan_mac = NULL; - - if (nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE, - "lan_mac=", mac) == 0) { - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); - wlan_mac = mac; - } - - ar71xx_add_device_mdio(0, DIR_615C1_MDIO_MASK); - - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.phy_mask = DIR_615C1_LAN_PHYMASK; - - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = DIR_615C1_WAN_PHYMASK; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&dir_615c1_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio), - dir_615c1_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir_615c1_gpio_keys), - dir_615c1_gpio_keys); - - ar9xxx_add_device_wmac(eeprom, wlan_mac); -} - -MIPS_MACHINE(AR71XX_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1", - dir_615c1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-825-b1.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-825-b1.c deleted file mode 100644 index fe672ff46..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-825-b1.c +++ /dev/null @@ -1,211 +0,0 @@ -/* - * D-Link DIR-825 rev. B1 board support - * - * Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o. - * - * based on mach-wndr3700.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/delay.h> -#include <linux/rtl8366.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap94-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define DIR825B1_GPIO_LED_BLUE_USB 0 -#define DIR825B1_GPIO_LED_ORANGE_POWER 1 -#define DIR825B1_GPIO_LED_BLUE_POWER 2 -#define DIR825B1_GPIO_LED_BLUE_WPS 4 -#define DIR825B1_GPIO_LED_ORANGE_PLANET 6 -#define DIR825B1_GPIO_LED_BLUE_PLANET 11 - -#define DIR825B1_GPIO_BTN_RESET 3 -#define DIR825B1_GPIO_BTN_WPS 8 - -#define DIR825B1_GPIO_RTL8366_SDA 5 -#define DIR825B1_GPIO_RTL8366_SCK 7 - -#define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL) - -#define DIR825B1_CAL_LOCATION_0 0x1f661000 -#define DIR825B1_CAL_LOCATION_1 0x1f665000 - -#define DIR825B1_MAC_LOCATION_0 0x1f66ffa0 -#define DIR825B1_MAC_LOCATION_1 0x1f66ffb4 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition dir825b1_partitions[] = { - { - .name = "uboot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "config", - .offset = 0x040000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x610000, - }, { - .name = "caldata", - .offset = 0x660000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "unknown", - .offset = 0x670000, - .size = 0x190000, - .mask_flags = MTD_WRITEABLE, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data dir825b1_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = dir825b1_partitions, - .nr_parts = ARRAY_SIZE(dir825b1_partitions), -#endif -}; - -static struct gpio_led dir825b1_leds_gpio[] __initdata = { - { - .name = "dir825b1:blue:usb", - .gpio = DIR825B1_GPIO_LED_BLUE_USB, - .active_low = 1, - }, { - .name = "dir825b1:orange:power", - .gpio = DIR825B1_GPIO_LED_ORANGE_POWER, - .active_low = 1, - }, { - .name = "dir825b1:blue:power", - .gpio = DIR825B1_GPIO_LED_BLUE_POWER, - .active_low = 1, - }, { - .name = "dir825b1:blue:wps", - .gpio = DIR825B1_GPIO_LED_BLUE_WPS, - .active_low = 1, - }, { - .name = "dir825b1:orange:planet", - .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET, - .active_low = 1, - }, { - .name = "dir825b1:blue:planet", - .gpio = DIR825B1_GPIO_LED_BLUE_PLANET, - .active_low = 1, - } -}; - -static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR825B1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR825B1_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = { - { .reg = 0x06, .val = 0x0108 }, -}; - -static struct rtl8366_platform_data dir825b1_rtl8366s_data = { - .gpio_sda = DIR825B1_GPIO_RTL8366_SDA, - .gpio_sck = DIR825B1_GPIO_RTL8366_SCK, - .num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals), - .initvals = dir825b1_rtl8366s_initvals, -}; - -static struct platform_device dir825b1_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &dir825b1_rtl8366s_data, - } -}; - -static void dir825b1_read_ascii_mac(u8 *dest, unsigned int src_addr) -{ - int ret; - u8 *src = (u8 *)KSEG1ADDR(src_addr); - - ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &dest[0], &dest[1], &dest[2], - &dest[3], &dest[4], &dest[5]); - - if (ret != ETH_ALEN) memset(dest, 0, ETH_ALEN); -} - -static void __init dir825b1_setup(void) -{ - u8 mac1[ETH_ALEN], mac2[ETH_ALEN]; - - dir825b1_read_ascii_mac(mac1, DIR825B1_MAC_LOCATION_0); - dir825b1_read_ascii_mac(mac2, DIR825B1_MAC_LOCATION_1); - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 2); - ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_pll_data.pll_1000 = 0x11110000; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac1, 3); - ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = 0x10; - ar71xx_eth1_pll_data.pll_1000 = 0x11110000; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&dir825b1_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio), - dir825b1_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir825b1_gpio_keys), - dir825b1_gpio_keys); - - ar71xx_add_device_usb(); - - platform_device_register(&dir825b1_rtl8366s_device); - - ap94_pci_setup_wmac_led_pin(0, 5); - ap94_pci_setup_wmac_led_pin(1, 5); - - ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), mac1, - (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), mac2); -} - -MIPS_MACHINE(AR71XX_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1", - dir825b1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-eap7660d.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-eap7660d.c deleted file mode 100644 index d1e49eef0..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-eap7660d.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * Senao EAP7660D board support - * - * Copyright (C) 2010 Daniel Golle <daniel.golle@gmail.com> - * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/ath5k_platform.h> -#include <linux/delay.h> -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" - -#define EAP7660D_KEYS_POLL_INTERVAL 20 /* msecs */ -#define EAP7660D_KEYS_DEBOUNCE_INTERVAL (3 * EAP7660D_KEYS_POLL_INTERVAL) - -#define EAP7660D_GPIO_DS4 7 -#define EAP7660D_GPIO_DS5 2 -#define EAP7660D_GPIO_DS7 0 -#define EAP7660D_GPIO_DS8 4 -#define EAP7660D_GPIO_SW1 3 -#define EAP7660D_GPIO_SW3 8 -#define EAP7660D_PHYMASK BIT(20) -#define EAP7660D_BOARDCONFIG 0x1F7F0000 -#define EAP7660D_GBIC_MAC_OFFSET 0x1000 -#define EAP7660D_WMAC0_MAC_OFFSET 0x1010 -#define EAP7660D_WMAC1_MAC_OFFSET 0x1016 -#define EAP7660D_WMAC0_CALDATA_OFFSET 0x2000 -#define EAP7660D_WMAC1_CALDATA_OFFSET 0x3000 - -static struct ath5k_platform_data eap7660d_wmac0_data; -static struct ath5k_platform_data eap7660d_wmac1_data; -static char eap7660d_wmac0_mac[6]; -static char eap7660d_wmac1_mac[6]; -static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; -static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; - -#ifdef CONFIG_PCI -static struct ar71xx_pci_irq eap7660d_pci_irqs[] __initdata = { - { - .slot = 0, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV0, - }, { - .slot = 1, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV1, - } -}; - -static int eap7660d_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 17: - dev->dev.platform_data = &eap7660d_wmac0_data; - break; - - case 18: - dev->dev.platform_data = &eap7660d_wmac1_data; - break; - } - - return 0; -} - -void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ - if (cal_data0 && *cal_data0 == 0xa55a) { - memcpy(eap7660d_wmac0_eeprom, cal_data0, - ATH5K_PLAT_EEP_MAX_WORDS); - eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom; - } - - if (cal_data1 && *cal_data1 == 0xa55a) { - memcpy(eap7660d_wmac1_eeprom, cal_data1, - ATH5K_PLAT_EEP_MAX_WORDS); - eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom; - } - - if (mac_addr0) { - memcpy(eap7660d_wmac0_mac, mac_addr0, - sizeof(eap7660d_wmac0_mac)); - eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac; - } - - if (mac_addr1) { - memcpy(eap7660d_wmac1_mac, mac_addr1, - sizeof(eap7660d_wmac1_mac)); - eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac; - } - - ar71xx_pci_plat_dev_init = eap7660d_pci_plat_dev_init; - ar71xx_pci_init(ARRAY_SIZE(eap7660d_pci_irqs), eap7660d_pci_irqs); -} -#else -static inline void eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ -} -#endif /* CONFIG_PCI */ - -static struct gpio_led eap7660d_leds_gpio[] __initdata = { - { - .name = "eap7660d:green:ds8", - .gpio = EAP7660D_GPIO_DS8, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds5", - .gpio = EAP7660D_GPIO_DS5, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds7", - .gpio = EAP7660D_GPIO_DS7, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds4", - .gpio = EAP7660D_GPIO_DS4, - .active_low = 0, - } -}; - -static struct gpio_keys_button eap7660d_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, - .gpio = EAP7660D_GPIO_SW1, - .active_low = 1, - }, - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, - .gpio = EAP7660D_GPIO_SW3, - .active_low = 1, - } -}; - -static const char *eap7660d_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data eap7660d_flash_data = { - .part_probes = eap7660d_part_probes, -}; - -static void __init eap7660d_setup(void) -{ - u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG); - - ar71xx_add_device_mdio(0, ~EAP7660D_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, - boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.phy_mask = EAP7660D_PHYMASK; - ar71xx_add_device_eth(0); - ar71xx_add_device_m25p80(&eap7660d_flash_data); - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(eap7660d_leds_gpio), - eap7660d_leds_gpio); - ar71xx_register_gpio_keys_polled(-1, EAP7660D_KEYS_POLL_INTERVAL, - ARRAY_SIZE(eap7660d_gpio_keys), - eap7660d_gpio_keys); - eap7660d_pci_init(boardconfig + EAP7660D_WMAC0_CALDATA_OFFSET, - boardconfig + EAP7660D_WMAC0_MAC_OFFSET, - boardconfig + EAP7660D_WMAC1_CALDATA_OFFSET, - boardconfig + EAP7660D_WMAC1_MAC_OFFSET); -}; - -MIPS_MACHINE(AR71XX_MACH_EAP7660D, "EAP7660D", "Senao EAP7660D", - eap7660d_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-hornet-ub.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-hornet-ub.c deleted file mode 100644 index 6173d223d..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-hornet-ub.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * ALFA NETWORKS Hornet-UB board support - * - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" - -#define HORNET_UB_GPIO_LED_WLAN 0 -#define HORNET_UB_GPIO_LED_USB 1 -#define HORNET_UB_GPIO_LED_LAN 13 -#define HORNET_UB_GPIO_LED_WAN 17 -#define HORNET_UB_GPIO_LED_WPS 27 - -#define HORNET_UB_GPIO_BTN_RESET 11 -#define HORNET_UB_GPIO_BTN_WPS 12 - -#define HORNET_UB_GPIO_USB_POWER 26 - -#define HORNET_UB_KEYS_POLL_INTERVAL 20 /* msecs */ -#define HORNET_UB_KEYS_DEBOUNCE_INTERVAL (3 * HORNET_UB_KEYS_POLL_INTERVAL) - -#define HORNET_UB_MAC0_OFFSET 0x0000 -#define HORNET_UB_MAC1_OFFSET 0x0006 -#define HORNET_UB_CALDATA_OFFSET 0x1000 - -static struct gpio_led hornet_ub_leds_gpio[] __initdata = { - { - .name = "alfa:blue:lan", - .gpio = HORNET_UB_GPIO_LED_LAN, - .active_low = 0, - }, - { - .name = "alfa:blue:usb", - .gpio = HORNET_UB_GPIO_LED_USB, - .active_low = 0, - }, - { - .name = "alfa:blue:wan", - .gpio = HORNET_UB_GPIO_LED_WAN, - .active_low = 1, - }, - { - .name = "alfa:blue:wlan", - .gpio = HORNET_UB_GPIO_LED_WLAN, - .active_low = 0, - }, - { - .name = "alfa:blue:wps", - .gpio = HORNET_UB_GPIO_LED_WPS, - .active_low = 1, - }, -}; - -static struct gpio_keys_button hornet_ub_gpio_keys[] __initdata = { - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, - .gpio = HORNET_UB_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, - .gpio = HORNET_UB_GPIO_BTN_RESET, - .active_low = 0, - } -}; - -static void __init hornet_ub_gpio_setup(void) -{ - u32 t; - - ar71xx_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - t = ar71xx_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; - ar71xx_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); - - gpio_request(HORNET_UB_GPIO_USB_POWER, "USB power"); - gpio_direction_output(HORNET_UB_GPIO_USB_POWER, 1); -} - -static void __init hornet_ub_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - hornet_ub_gpio_setup(); - - ar71xx_add_device_m25p80(NULL); - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio), - hornet_ub_leds_gpio); - ar71xx_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL, - ARRAY_SIZE(hornet_ub_gpio_keys), - hornet_ub_gpio_keys); - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, - art + HORNET_UB_MAC0_OFFSET, 0); - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, - art + HORNET_UB_MAC1_OFFSET, 0); - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_add_device_eth(1); - ar71xx_add_device_eth(0); - - ar9xxx_add_device_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL); - ar71xx_add_device_usb(); -} - -MIPS_MACHINE(AR71XX_MACH_HORNET_UB, "HORNET-UB", "ALFA NETWORKS Hornet-UB", - hornet_ub_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ja76pf.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ja76pf.c deleted file mode 100644 index 9f56c3fa7..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ja76pf.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * jjPlus JA76PF board support - */ - -#include <asm/mach-ar71xx/ar71xx.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/i2c-gpio.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-pb42-pci.h" -#include "dev-usb.h" -#include "dev-leds-gpio.h" - -#define JA76PF_KEYS_POLL_INTERVAL 20 /* msecs */ -#define JA76PF_KEYS_DEBOUNCE_INTERVAL (3 * JA76PF_KEYS_POLL_INTERVAL) - -#define JA76PF_GPIO_I2C_SCL 0 -#define JA76PF_GPIO_I2C_SDA 1 -#define JA76PF_GPIO_LED_1 5 -#define JA76PF_GPIO_LED_2 4 -#define JA76PF_GPIO_LED_3 3 -#define JA76PF_GPIO_BTN_RESET 11 - -static struct gpio_led ja76pf_leds_gpio[] __initdata = { - { - .name = "ja76pf:green:led1", - .gpio = JA76PF_GPIO_LED_1, - .active_low = 1, - }, { - .name = "ja76pf:green:led2", - .gpio = JA76PF_GPIO_LED_2, - .active_low = 1, - }, { - .name = "ja76pf:green:led3", - .gpio = JA76PF_GPIO_LED_3, - .active_low = 1, - } -}; - -static struct gpio_keys_button ja76pf_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, - .gpio = JA76PF_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data ja76pf_i2c_gpio_data = { - .sda_pin = JA76PF_GPIO_I2C_SDA, - .scl_pin = JA76PF_GPIO_I2C_SCL, -}; - -static struct platform_device ja76pf_i2c_gpio_device = { - .name = "i2c-gpio", - .id = 0, - .dev = { - .platform_data = &ja76pf_i2c_gpio_data, - } -}; - -static const char *ja76pf_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data ja76pf_flash_data = { - .part_probes = ja76pf_part_probes, -}; - -#define JA76PF_WAN_PHYMASK (1 << 4) -#define JA76PF_LAN_PHYMASK ((1 << 0) | (1 << 1) | (1 << 2) | (1 < 3)) -#define JA76PF_MDIO_PHYMASK (JA76PF_LAN_PHYMASK | JA76PF_WAN_PHYMASK) - -static void __init ja76pf_init(void) -{ - ar71xx_add_device_m25p80(&ja76pf_flash_data); - - ar71xx_add_device_mdio(0, ~JA76PF_MDIO_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.phy_mask = JA76PF_LAN_PHYMASK; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = JA76PF_WAN_PHYMASK; - ar71xx_eth1_data.speed = SPEED_1000; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - platform_device_register(&ja76pf_i2c_gpio_device); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ja76pf_leds_gpio), - ja76pf_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ja76pf_gpio_keys), - ja76pf_gpio_keys); - - ar71xx_add_device_usb(); - pb42_pci_init(); -} - -MIPS_MACHINE(AR71XX_MACH_JA76PF, "JA76PF", "jjPlus JA76PF", ja76pf_init); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-jwap003.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-jwap003.c deleted file mode 100644 index 3af42041f..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-jwap003.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * jjPlus JWAP003 board support - * - */ - -#include <asm/mach-ar71xx/ar71xx.h> -#include <linux/i2c.h> -#include <linux/i2c-gpio.h> -#include <linux/platform_device.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-pb42-pci.h" -#include "dev-usb.h" - -#define JWAP003_KEYS_POLL_INTERVAL 20 /* msecs */ -#define JWAP003_KEYS_DEBOUNCE_INTERVAL (3 * JWAP003_KEYS_POLL_INTERVAL) - -#define JWAP003_GPIO_WPS 11 -#define JWAP003_GPIO_I2C_SCL 0 -#define JWAP003_GPIO_I2C_SDA 1 - -static struct gpio_keys_button jwap003_gpio_keys[] __initdata = { - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = JWAP003_KEYS_DEBOUNCE_INTERVAL, - .gpio = JWAP003_GPIO_WPS, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data jwap003_i2c_gpio_data = { - .sda_pin = JWAP003_GPIO_I2C_SDA, - .scl_pin = JWAP003_GPIO_I2C_SCL, -}; - -static struct platform_device jwap003_i2c_gpio_device = { - .name = "i2c-gpio", - .id = 0, - .dev = { - .platform_data = &jwap003_i2c_gpio_data, - } -}; - -static const char *jwap003_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data jwap003_flash_data = { - .part_probes = jwap003_part_probes, -}; - -#define JWAP003_WAN_PHYMASK BIT(0) -#define JWAP003_LAN_PHYMASK BIT(4) - -static void __init jwap003_init(void) -{ - ar71xx_add_device_m25p80(&jwap003_flash_data); - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.phy_mask = JWAP003_WAN_PHYMASK; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.has_ar8216 = 1; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = JWAP003_LAN_PHYMASK; - ar71xx_eth1_data.speed = SPEED_100; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - platform_device_register(&jwap003_i2c_gpio_device); - - ar71xx_add_device_usb(); - - ar71xx_register_gpio_keys_polled(-1, JWAP003_KEYS_POLL_INTERVAL, - ARRAY_SIZE(jwap003_gpio_keys), - jwap003_gpio_keys); - - pb42_pci_init(); -} - -MIPS_MACHINE(AR71XX_MACH_JWAP003, "JWAP003", "jjPlus JWAP003", jwap003_init); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c deleted file mode 100644 index dbb408cbb..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - * Planex MZK-W04NU board support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" - -#define MZK_W04NU_GPIO_LED_USB 0 -#define MZK_W04NU_GPIO_LED_STATUS 1 -#define MZK_W04NU_GPIO_LED_WPS 3 -#define MZK_W04NU_GPIO_LED_WLAN 6 -#define MZK_W04NU_GPIO_LED_AP 15 -#define MZK_W04NU_GPIO_LED_ROUTER 16 - -#define MZK_W04NU_GPIO_BTN_APROUTER 5 -#define MZK_W04NU_GPIO_BTN_WPS 12 -#define MZK_W04NU_GPIO_BTN_RESET 21 - -#define MZK_W04NU_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MZK_W04NU_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W04NU_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition mzk_w04nu_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x050000, - .size = 0x160000, - }, { - .name = "rootfs", - .offset = 0x1b0000, - .size = 0x630000, - }, { - .name = "art", - .offset = 0x7e0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x790000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data mzk_w04nu_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = mzk_w04nu_partitions, - .nr_parts = ARRAY_SIZE(mzk_w04nu_partitions), -#endif -}; - -static struct gpio_led mzk_w04nu_leds_gpio[] __initdata = { - { - .name = "planex:green:status", - .gpio = MZK_W04NU_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "planex:blue:wps", - .gpio = MZK_W04NU_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "planex:green:wlan", - .gpio = MZK_W04NU_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "planex:green:usb", - .gpio = MZK_W04NU_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "planex:green:ap", - .gpio = MZK_W04NU_GPIO_LED_AP, - .active_low = 1, - }, { - .name = "planex:green:router", - .gpio = MZK_W04NU_GPIO_LED_ROUTER, - .active_low = 1, - } -}; - -static struct gpio_keys_button mzk_w04nu_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "aprouter", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_APROUTER, - .active_low = 0, - } -}; - -#define MZK_W04NU_WAN_PHYMASK BIT(4) -#define MZK_W04NU_MDIO_MASK (~MZK_W04NU_WAN_PHYMASK) - -static void __init mzk_w04nu_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_mdio(0, MZK_W04NU_MDIO_MASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.has_ar8216 = 1; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&mzk_w04nu_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(mzk_w04nu_leds_gpio), - mzk_w04nu_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, MZK_W04NU_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mzk_w04nu_gpio_keys), - mzk_w04nu_gpio_keys); - ar71xx_add_device_usb(); - - ar9xxx_add_device_wmac(eeprom, NULL); -} - -MIPS_MACHINE(AR71XX_MACH_MZK_W04NU, "MZK-W04NU", "Planex MZK-W04NU", - mzk_w04nu_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w300nh.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w300nh.c deleted file mode 100644 index 98b3f0092..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w300nh.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Planex MZK-W300NH board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define MZK_W300NH_GPIO_LED_STATUS 1 -#define MZK_W300NH_GPIO_LED_WPS 3 -#define MZK_W300NH_GPIO_LED_WLAN 6 -#define MZK_W300NH_GPIO_LED_AP 15 -#define MZK_W300NH_GPIO_LED_ROUTER 16 - -#define MZK_W300NH_GPIO_BTN_APROUTER 5 -#define MZK_W300NH_GPIO_BTN_WPS 12 -#define MZK_W300NH_GPIO_BTN_RESET 21 - -#define MZK_W300NH_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MZK_W300NH_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W300NH_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition mzk_w300nh_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x050000, - .size = 0x160000, - }, { - .name = "rootfs", - .offset = 0x1b0000, - .size = 0x630000, - }, { - .name = "art", - .offset = 0x7e0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x790000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data mzk_w300nh_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = mzk_w300nh_partitions, - .nr_parts = ARRAY_SIZE(mzk_w300nh_partitions), -#endif -}; - -static struct gpio_led mzk_w300nh_leds_gpio[] __initdata = { - { - .name = "planex:green:status", - .gpio = MZK_W300NH_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "planex:blue:wps", - .gpio = MZK_W300NH_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "planex:green:wlan", - .gpio = MZK_W300NH_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "planex:green:ap", - .gpio = MZK_W300NH_GPIO_LED_AP, - .active_low = 1, - }, { - .name = "planex:green:router", - .gpio = MZK_W300NH_GPIO_LED_ROUTER, - .active_low = 1, - } -}; - -static struct gpio_keys_button mzk_w300nh_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "aprouter", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_APROUTER, - .active_low = 0, - } -}; - -#define MZK_W300NH_WAN_PHYMASK BIT(4) -#define MZK_W300NH_MDIO_MASK (~MZK_W300NH_WAN_PHYMASK) - -static void __init mzk_w300nh_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_mdio(0, MZK_W300NH_MDIO_MASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.has_ar8216 = 1; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = MZK_W300NH_WAN_PHYMASK; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&mzk_w300nh_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(mzk_w300nh_leds_gpio), - mzk_w300nh_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, MZK_W300NH_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mzk_w300nh_gpio_keys), - mzk_w300nh_gpio_keys); - ar9xxx_add_device_wmac(eeprom, NULL); -} - -MIPS_MACHINE(AR71XX_MACH_MZK_W300NH, "MZK-W300NH", "Planex MZK-W300NH", - mzk_w300nh_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-nbg460n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-nbg460n.c deleted file mode 100644 index e1d959243..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-nbg460n.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Zyxel NBG 460N/550N/550NH board support - * - * Copyright (C) 2010 Michael Kurz <michi.kurz@googlemail.com> - * - * based on mach-tl-wr1043nd.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/delay.h> -#include <linux/rtl8366.h> - -#include <linux/i2c.h> -#include <linux/i2c-algo-bit.h> -#include <linux/i2c-gpio.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -/* LEDs */ -#define NBG460N_GPIO_LED_WPS 3 -#define NBG460N_GPIO_LED_WAN 6 -#define NBG460N_GPIO_LED_POWER 14 -#define NBG460N_GPIO_LED_WLAN 15 - -/* Buttons */ -#define NBG460N_GPIO_BTN_WPS 12 -#define NBG460N_GPIO_BTN_RESET 21 - -#define NBG460N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define NBG460N_KEYS_DEBOUNCE_INTERVAL (3 * NBG460N_KEYS_POLL_INTERVAL) - -/* RTC chip PCF8563 I2C interface */ -#define NBG460N_GPIO_PCF8563_SDA 8 -#define NBG460N_GPIO_PCF8563_SCK 7 - -/* Switch configuration I2C interface */ -#define NBG460N_GPIO_RTL8366_SDA 16 -#define NBG460N_GPIO_RTL8366_SCK 18 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition nbg460n_partitions[] = { - { - .name = "Bootbase", - .offset = 0, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "U-Boot Config", - .offset = 0x010000, - .size = 0x030000, - }, { - .name = "U-Boot", - .offset = 0x040000, - .size = 0x030000, - }, { - .name = "linux", - .offset = 0x070000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x150000, - .size = 0x2a0000, - }, { - .name = "CalibData", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x070000, - .size = 0x380000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data nbg460n_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = nbg460n_partitions, - .nr_parts = ARRAY_SIZE(nbg460n_partitions), -#endif -}; - -static struct gpio_led nbg460n_leds_gpio[] __initdata = { - { - .name = "nbg460n:green:power", - .gpio = NBG460N_GPIO_LED_POWER, - .active_low = 0, - .default_trigger = "default-on", - }, { - .name = "nbg460n:green:wps", - .gpio = NBG460N_GPIO_LED_WPS, - .active_low = 0, - }, { - .name = "nbg460n:green:wlan", - .gpio = NBG460N_GPIO_LED_WLAN, - .active_low = 0, - }, { - /* Not really for controlling the LED, - when set low the LED blinks uncontrollable */ - .name = "nbg460n:green:wan", - .gpio = NBG460N_GPIO_LED_WAN, - .active_low = 0, - } -}; - -static struct gpio_keys_button nbg460n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG460N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG460N_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data nbg460n_i2c_device_platdata = { - .sda_pin = NBG460N_GPIO_PCF8563_SDA, - .scl_pin = NBG460N_GPIO_PCF8563_SCK, - .udelay = 10, -}; - -static struct platform_device nbg460n_i2c_device = { - .name = "i2c-gpio", - .id = -1, - .num_resources = 0, - .resource = NULL, - .dev = { - .platform_data = &nbg460n_i2c_device_platdata, - }, -}; - -static struct i2c_board_info nbg460n_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("pcf8563", 0x51), - }, -}; - -static void __devinit nbg460n_i2c_init(void) -{ - /* The gpio interface */ - platform_device_register(&nbg460n_i2c_device); - /* I2C devices */ - i2c_register_board_info(0, nbg460n_i2c_devs, - ARRAY_SIZE(nbg460n_i2c_devs)); -} - - -static struct rtl8366_platform_data nbg460n_rtl8366s_data = { - .gpio_sda = NBG460N_GPIO_RTL8366_SDA, - .gpio_sck = NBG460N_GPIO_RTL8366_SCK, -}; - -static struct platform_device nbg460n_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &nbg460n_rtl8366s_data, - } -}; - -static void __init nbg460n_setup(void) -{ - /* end of bootloader sector contains mac address */ - u8 *mac = (u8 *) KSEG1ADDR(0x1fc0fff8); - /* last sector contains wlan calib data */ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - /* LAN Port */ - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_eth0_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - /* WAN Port */ - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); - ar71xx_eth1_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = 0x10; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - /* register the switch phy */ - platform_device_register(&nbg460n_rtl8366s_device); - - /* register flash */ - ar71xx_add_device_m25p80(&nbg460n_flash_data); - - ar9xxx_add_device_wmac(eeprom, mac); - - /* register RTC chip */ - nbg460n_i2c_init(); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(nbg460n_leds_gpio), - nbg460n_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, NBG460N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(nbg460n_gpio_keys), - nbg460n_gpio_keys); -} - -MIPS_MACHINE(AR71XX_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", - nbg460n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-om2p.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-om2p.c deleted file mode 100644 index e43ad745c..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-om2p.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * OpenMesh OM2P support - * - * Copyright (C) 2011 Marek Lindner <marek@open-mesh.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/gpio.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ap91-pci.h" -#include "dev-m25p80.h" -#include "dev-leds-gpio.h" -#include "dev-gpio-buttons.h" - -#define OM2P_GPIO_LED_POWER 0 -#define OM2P_GPIO_LED_GREEN 13 -#define OM2P_GPIO_LED_RED 14 -#define OM2P_GPIO_LED_YELLOW 15 -#define OM2P_GPIO_LED_LAN 16 -#define OM2P_GPIO_LED_WAN 17 -#define OM2P_GPIO_BTN_RESET 11 - -#define OM2P_KEYS_POLL_INTERVAL 20 /* msecs */ -#define OM2P_KEYS_DEBOUNCE_INTERVAL (3 * OM2P_KEYS_POLL_INTERVAL) - -#define OM2P_WAN_PHYMASK BIT(4) - -static struct flash_platform_data om2p_flash_data = { - .type = "s25sl12800", - .name = "ar7240-nor0", -}; - -static struct gpio_led om2p_leds_gpio[] __initdata = { - { - .name = "om2p:blue:power", - .gpio = OM2P_GPIO_LED_POWER, - .active_low = 1, - }, { - .name = "om2p:red:wifi", - .gpio = OM2P_GPIO_LED_RED, - .active_low = 1, - }, { - .name = "om2p:yellow:wifi", - .gpio = OM2P_GPIO_LED_YELLOW, - .active_low = 1, - }, { - .name = "om2p:green:wifi", - .gpio = OM2P_GPIO_LED_GREEN, - .active_low = 1, - }, { - .name = "om2p:blue:lan", - .gpio = OM2P_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "om2p:blue:wan", - .gpio = OM2P_GPIO_LED_WAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button om2p_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL, - .gpio = OM2P_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init om2p_setup(void) -{ - u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); - u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); - u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000); - - ar71xx_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ar71xx_add_device_m25p80(&om2p_flash_data); - - ar71xx_add_device_mdio(0, ~OM2P_WAN_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac2, 0); - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ap91_pci_init(ee, NULL); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), - om2p_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, - ARRAY_SIZE(om2p_gpio_keys), - om2p_gpio_keys); -} - -MIPS_MACHINE(AR71XX_MACH_OM2P, "OM2P", "OpenMesh OM2P", om2p_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c deleted file mode 100644 index 1a3d8c51a..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Atheros PB42 board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-pb42-pci.h" -#include "dev-usb.h" - -#define PB42_KEYS_POLL_INTERVAL 20 /* msecs */ -#define PB42_KEYS_DEBOUNCE_INTERVAL (3 * PB42_KEYS_POLL_INTERVAL) - -#define PB42_GPIO_BTN_SW4 8 -#define PB42_GPIO_BTN_SW5 3 - -static struct gpio_keys_button pb42_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB42_GPIO_BTN_SW4, - .active_low = 1, - }, { - .desc = "sw5", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB42_GPIO_BTN_SW5, - .active_low = 1, - } -}; - -static const char *pb42_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data pb42_flash_data = { - .part_probes = pb42_part_probes, -}; - -#define PB42_WAN_PHYMASK BIT(20) -#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) -#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK) - -static void __init pb42_init(void) -{ - ar71xx_add_device_m25p80(&pb42_flash_data); - - ar71xx_add_device_mdio(0, ~PB42_MDIO_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = PB42_WAN_PHYMASK; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.speed = SPEED_100; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL, - ARRAY_SIZE(pb42_gpio_keys), - pb42_gpio_keys); - - pb42_pci_init(); -} - -MIPS_MACHINE(AR71XX_MACH_PB42, "PB42", "Atheros PB42", pb42_init); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c deleted file mode 100644 index 5e013504e..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Atheros PB44 board support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/bitops.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/spi/vsc7385.h> -#include <linux/i2c.h> -#include <linux/i2c-gpio.h> -#include <linux/i2c/pcf857x.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-pb42-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define PB44_PCF8757_VSC7395_CS 0 -#define PB44_PCF8757_STEREO_CS 1 -#define PB44_PCF8757_SLIC_CS0 2 -#define PB44_PCF8757_SLIC_TEST 3 -#define PB44_PCF8757_SLIC_INT0 4 -#define PB44_PCF8757_SLIC_INT1 5 -#define PB44_PCF8757_SW_RESET 6 -#define PB44_PCF8757_SW_JUMP 8 -#define PB44_PCF8757_LED_JUMP1 9 -#define PB44_PCF8757_LED_JUMP2 10 -#define PB44_PCF8757_TP24 11 -#define PB44_PCF8757_TP25 12 -#define PB44_PCF8757_TP26 13 -#define PB44_PCF8757_TP27 14 -#define PB44_PCF8757_TP28 15 - -#define PB44_GPIO_I2C_SCL 0 -#define PB44_GPIO_I2C_SDA 1 - -#define PB44_GPIO_EXP_BASE 16 -#define PB44_GPIO_VSC7395_CS (PB44_GPIO_EXP_BASE + PB44_PCF8757_VSC7395_CS) -#define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + PB44_PCF8757_SW_RESET) -#define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + PB44_PCF8757_SW_JUMP) -#define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + PB44_PCF8757_LED_JUMP1) -#define PB44_GPIO_LED_JUMP2 (PB44_GPIO_EXP_BASE + PB44_PCF8757_LED_JUMP2) - -#define PB44_KEYS_POLL_INTERVAL 20 /* msecs */ -#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL) - -static struct i2c_gpio_platform_data pb44_i2c_gpio_data = { - .sda_pin = PB44_GPIO_I2C_SDA, - .scl_pin = PB44_GPIO_I2C_SCL, -}; - -static struct platform_device pb44_i2c_gpio_device = { - .name = "i2c-gpio", - .id = 0, - .dev = { - .platform_data = &pb44_i2c_gpio_data, - } -}; - -static struct pcf857x_platform_data pb44_pcf857x_data = { - .gpio_base = PB44_GPIO_EXP_BASE, -}; - -static struct i2c_board_info pb44_i2c_board_info[] __initdata = { - { - I2C_BOARD_INFO("pcf8575", 0x20), - .platform_data = &pb44_pcf857x_data, - }, -}; - -static struct gpio_led pb44_leds_gpio[] __initdata = { - { - .name = "pb44:amber:jump1", - .gpio = PB44_GPIO_LED_JUMP1, - .active_low = 1, - }, { - .name = "pb44:green:jump2", - .gpio = PB44_GPIO_LED_JUMP2, - .active_low = 1, - }, -}; - -static struct gpio_keys_button pb44_gpio_keys[] __initdata = { - { - .desc = "soft_reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB44_GPIO_SW_RESET, - .active_low = 1, - }, { - .desc = "jumpstart", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB44_GPIO_SW_JUMP, - .active_low = 1, - } -}; - -static void pb44_vsc7395_reset(void) -{ - ar71xx_device_stop(RESET_MODULE_GE1_PHY); - udelay(10); - ar71xx_device_start(RESET_MODULE_GE1_PHY); - mdelay(50); -} - -static struct vsc7385_platform_data pb44_vsc7395_data = { - .reset = pb44_vsc7395_reset, - .ucode_name = "vsc7395_ucode_pb44.bin", - .mac_cfg = { - .tx_ipg = 6, - .bit2 = 1, - .clk_sel = 0, - }, -}; - -static const char *pb44_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data pb44_flash_data = { - .part_probes = pb44_part_probes, -}; - -static struct spi_board_info pb44_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .platform_data = &pb44_flash_data, - }, { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "spi-vsc7385", - .platform_data = &pb44_vsc7395_data, - .controller_data = (void *) PB44_GPIO_VSC7395_CS, - }, -}; - -static struct resource pb44_spi_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct ar71xx_spi_platform_data pb44_spi_data = { - .bus_num = 0, - .num_chipselect = 2, -}; - -static struct platform_device pb44_spi_device = { - .name = "pb44-spi", - .id = -1, - .resource = pb44_spi_resources, - .num_resources = ARRAY_SIZE(pb44_spi_resources), - .dev = { - .platform_data = &pb44_spi_data, - }, -}; - -#define PB44_WAN_PHYMASK BIT(0) -#define PB44_LAN_PHYMASK 0 -#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK) - -static void __init pb44_init(void) -{ - ar71xx_add_device_mdio(0, ~PB44_MDIO_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.phy_mask = PB44_WAN_PHYMASK; - - ar71xx_add_device_eth(0); - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.speed = SPEED_1000; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - ar71xx_eth1_pll_data.pll_1000 = 0x110000; - - ar71xx_add_device_eth(1); - - ar71xx_add_device_usb(); - - pb42_pci_init(); - - i2c_register_board_info(0, pb44_i2c_board_info, - ARRAY_SIZE(pb44_i2c_board_info)); - - platform_device_register(&pb44_i2c_gpio_device); - - spi_register_board_info(pb44_spi_info, ARRAY_SIZE(pb44_spi_info)); - platform_device_register(&pb44_spi_device); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio), - pb44_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL, - ARRAY_SIZE(pb44_gpio_keys), - pb44_gpio_keys); -} - -MIPS_MACHINE(AR71XX_MACH_PB44, "PB44", "Atheros PB44", pb44_init); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c deleted file mode 100644 index 4c5d3ab4a..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Atheros PB92 board support - * - * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-pb9x-pci.h" -#include "dev-usb.h" - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition pb92_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x2b0000, - }, { - .name = "uImage", - .offset = 0x300000, - .size = 0x0e0000, - }, { - .name = "ART", - .offset = 0x3e0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data pb92_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = pb92_partitions, - .nr_parts = ARRAY_SIZE(pb92_partitions), -#endif -}; - -#define PB92_KEYS_POLL_INTERVAL 20 /* msecs */ -#define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL) - -#define PB92_GPIO_BTN_SW4 8 -#define PB92_GPIO_BTN_SW5 3 - -static struct gpio_keys_button pb92_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB92_GPIO_BTN_SW4, - .active_low = 1, - }, { - .desc = "sw5", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB92_GPIO_BTN_SW5, - .active_low = 1, - } -}; - -static void __init pb92_init(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); - - ar71xx_add_device_m25p80(&pb92_flash_data); - - ar71xx_add_device_mdio(0, ~BIT(0)); - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.phy_mask = BIT(0); - - ar71xx_add_device_eth(0); - - ar71xx_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL, - ARRAY_SIZE(pb92_gpio_keys), - pb92_gpio_keys); - - pb9x_pci_init(); -} - -MIPS_MACHINE(AR71XX_MACH_PB92, "PB92", "Atheros PB92", pb92_init); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb4xx.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb4xx.c deleted file mode 100644 index 1b9f96bce..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb4xx.c +++ /dev/null @@ -1,406 +0,0 @@ -/* - * MikroTik RouterBOARD 4xx series support - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/irq.h> -#include <linux/mdio-gpio.h> -#include <linux/mmc/host.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/spi/mmc_spi.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> -#include <asm/mach-ar71xx/rb4xx_cpld.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define RB4XX_GPIO_USER_LED 4 -#define RB4XX_GPIO_RESET_SWITCH 7 - -#define RB4XX_GPIO_CPLD_BASE 32 -#define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1) -#define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2) -#define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3) -#define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4) -#define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5) - -#define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */ -#define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL) - -static struct gpio_led rb4xx_leds_gpio[] __initdata = { - { - .name = "rb4xx:yellow:user", - .gpio = RB4XX_GPIO_USER_LED, - .active_low = 0, - }, { - .name = "rb4xx:green:led1", - .gpio = RB4XX_GPIO_CPLD_LED1, - .active_low = 1, - }, { - .name = "rb4xx:green:led2", - .gpio = RB4XX_GPIO_CPLD_LED2, - .active_low = 1, - }, { - .name = "rb4xx:green:led3", - .gpio = RB4XX_GPIO_CPLD_LED3, - .active_low = 1, - }, { - .name = "rb4xx:green:led4", - .gpio = RB4XX_GPIO_CPLD_LED4, - .active_low = 1, - }, { - .name = "rb4xx:green:led5", - .gpio = RB4XX_GPIO_CPLD_LED5, - .active_low = 0, - }, -}; - -static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = { - { - .desc = "reset_switch", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL, - .gpio = RB4XX_GPIO_RESET_SWITCH, - .active_low = 1, - } -}; - -static struct platform_device rb4xx_nand_device = { - .name = "rb4xx-nand", - .id = -1, -}; - -static struct ar71xx_pci_irq rb4xx_pci_irqs[] __initdata = { - { - .slot = 0, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV2, - }, { - .slot = 1, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV0, - }, { - .slot = 1, - .pin = 2, - .irq = AR71XX_PCI_IRQ_DEV1, - }, { - .slot = 2, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV1, - }, { - .slot = 3, - .pin = 1, - .irq = AR71XX_PCI_IRQ_DEV2, - } -}; - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition rb4xx_partitions[] = { - { - .name = "routerboot", - .offset = 0, - .size = 0x0b000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "hard_config", - .offset = 0x0b000, - .size = 0x01000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "bios", - .offset = 0x0d000, - .size = 0x02000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "soft_config", - .offset = 0x0f000, - .size = 0x01000, - } -}; -#define rb4xx_num_partitions ARRAY_SIZE(rb4xx_partitions) -#else /* CONFIG_MTD_PARTITIONS */ -#define rb4xx_partitions NULL -#define rb4xx_num_partitions 0 -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data rb4xx_flash_data = { - .type = "pm25lv512", - .parts = rb4xx_partitions, - .nr_parts = rb4xx_num_partitions, -}; - -static struct rb4xx_cpld_platform_data rb4xx_cpld_data = { - .gpio_base = RB4XX_GPIO_CPLD_BASE, -}; - -static struct mmc_spi_platform_data rb4xx_mmc_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct spi_board_info rb4xx_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .platform_data = &rb4xx_flash_data, - }, { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "spi-rb4xx-cpld", - .platform_data = &rb4xx_cpld_data, - } -}; - -static struct spi_board_info rb4xx_microsd_info[] = { - { - .bus_num = 0, - .chip_select = 2, - .max_speed_hz = 25000000, - .modalias = "mmc_spi", - .platform_data = &rb4xx_mmc_data, - } -}; - - -static struct resource rb4xx_spi_resources[] = { - { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device rb4xx_spi_device = { - .name = "rb4xx-spi", - .id = -1, - .resource = rb4xx_spi_resources, - .num_resources = ARRAY_SIZE(rb4xx_spi_resources), -}; - -static void __init rb4xx_generic_setup(void) -{ - ar71xx_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), - rb4xx_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rb4xx_gpio_keys), - rb4xx_gpio_keys); - - spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); - platform_device_register(&rb4xx_spi_device); - platform_device_register(&rb4xx_nand_device); -} - -static void __init rb411_setup(void) -{ - rb4xx_generic_setup(); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); - - ar71xx_add_device_mdio(0, 0xfffffffc); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = 0x00000003; - - ar71xx_add_device_eth(0); - - ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -} - -MIPS_MACHINE(AR71XX_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH", - rb411_setup); - -static void __init rb411u_setup(void) -{ - rb411_setup(); - ar71xx_add_device_usb(); -} - -MIPS_MACHINE(AR71XX_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U", - rb411u_setup); - -#define RB433_LAN_PHYMASK BIT(0) -#define RB433_WAN_PHYMASK BIT(4) -#define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK) - -static void __init rb433_setup(void) -{ - rb4xx_generic_setup(); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); - - ar71xx_add_device_mdio(0, ~RB433_MDIO_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = RB433_LAN_PHYMASK; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = RB433_WAN_PHYMASK; - - ar71xx_add_device_eth(1); - ar71xx_add_device_eth(0); - - ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -} - -MIPS_MACHINE(AR71XX_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH", - rb433_setup); - -static void __init rb433u_setup(void) -{ - rb433_setup(); - ar71xx_add_device_usb(); -} - -MIPS_MACHINE(AR71XX_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH", - rb433u_setup); - -#define RB450_LAN_PHYMASK BIT(0) -#define RB450_WAN_PHYMASK BIT(4) -#define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK) - -static void __init rb450_generic_setup(int gige) -{ - rb4xx_generic_setup(); - ar71xx_add_device_mdio(0, ~RB450_MDIO_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth0_data.phy_if_mode = (gige) ? - PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth1_data.phy_if_mode = (gige) ? - PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK; - - ar71xx_add_device_eth(1); - ar71xx_add_device_eth(0); -} - -static void __init rb450_setup(void) -{ - rb450_generic_setup(0); -} - -MIPS_MACHINE(AR71XX_MACH_RB_450, "450", "MikroTik RouterBOARD 450", - rb450_setup); - -static void __init rb450g_setup(void) -{ - rb450_generic_setup(1); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); -} - -MIPS_MACHINE(AR71XX_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G", - rb450g_setup); - -static void __init rb493_setup(void) -{ - rb4xx_generic_setup(); - - ar71xx_add_device_mdio(0, 0x3fffff00); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = 0x00000001; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -} - -MIPS_MACHINE(AR71XX_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH", - rb493_setup); - -#define RB493G_GPIO_MDIO_MDC 7 -#define RB493G_GPIO_MDIO_DATA 8 - -#define RB493G_MDIO_PHYMASK BIT(0) - -static struct mdio_gpio_platform_data rb493g_mdio_data = { - .mdc = RB493G_GPIO_MDIO_MDC, - .mdio = RB493G_GPIO_MDIO_DATA, - - .phy_mask = ~RB493G_MDIO_PHYMASK, -}; - -static struct platform_device rb493g_mdio_device = { - .name = "mdio-gpio", - .id = -1, - .dev = { - .platform_data = &rb493g_mdio_data, - }, -}; - -static void __init rb493g_setup(void) -{ - ar71xx_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), - rb4xx_leds_gpio); - - spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); - platform_device_register(&rb4xx_spi_device); - platform_device_register(&rb4xx_nand_device); - - ar71xx_add_device_mdio(0, ~RB493G_MDIO_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.phy_mask = RB493G_MDIO_PHYMASK; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.mii_bus_dev = &rb493g_mdio_device.dev; - ar71xx_eth1_data.phy_mask = RB493G_MDIO_PHYMASK; - ar71xx_eth1_data.speed = SPEED_1000; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - - - platform_device_register(&rb493g_mdio_device); - - ar71xx_add_device_eth(1); - ar71xx_add_device_eth(0); - - ar71xx_add_device_usb(); - - ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -} - -MIPS_MACHINE(AR71XX_MACH_RB_493G, "493G", "MikroTik RouterBOARD 493G", - rb493g_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c deleted file mode 100644 index 9b63dc368..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * MikroTik RouterBOARD 750 support - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/mach-rb750.h> - -#include "machtype.h" -#include "devices.h" - -static struct rb750_led_data rb750_leds[] = { - { - .name = "rb750:green:act", - .mask = RB750_LED_ACT, - .active_low = 1, - }, { - .name = "rb750:green:port1", - .mask = RB750_LED_PORT5, - .active_low = 1, - }, { - .name = "rb750:green:port2", - .mask = RB750_LED_PORT4, - .active_low = 1, - }, { - .name = "rb750:green:port3", - .mask = RB750_LED_PORT3, - .active_low = 1, - }, { - .name = "rb750:green:port4", - .mask = RB750_LED_PORT2, - .active_low = 1, - }, { - .name = "rb750:green:port5", - .mask = RB750_LED_PORT1, - .active_low = 1, - } -}; - -static struct rb750_led_platform_data rb750_leds_data = { - .num_leds = ARRAY_SIZE(rb750_leds), - .leds = rb750_leds, -}; - -static struct platform_device rb750_leds_device = { - .name = "leds-rb750", - .dev = { - .platform_data = &rb750_leds_data, - } -}; - -static struct platform_device rb750_nand_device = { - .name = "rb750-nand", - .id = -1, -}; - -int rb750_latch_change(u32 mask_clr, u32 mask_set) -{ - static DEFINE_SPINLOCK(lock); - static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE; - static u32 latch_oe; - static u32 latch_clr; - unsigned long flags; - u32 t; - int ret = 0; - - spin_lock_irqsave(&lock, flags); - - if ((mask_clr & BIT(31)) != 0 && - (latch_set & RB750_LVC573_LE) == 0) { - goto unlock; - } - - latch_set = (latch_set | mask_set) & ~mask_clr; - latch_clr = (latch_clr | mask_clr) & ~mask_set; - - if (latch_oe == 0) - latch_oe = __raw_readl(ar71xx_gpio_base + AR71XX_GPIO_REG_OE); - - if (likely(latch_set & RB750_LVC573_LE)) { - void __iomem *base = ar71xx_gpio_base; - - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - t |= mask_clr | latch_oe | mask_set; - - __raw_writel(t, base + AR71XX_GPIO_REG_OE); - __raw_writel(latch_clr, base + AR71XX_GPIO_REG_CLEAR); - __raw_writel(latch_set, base + AR71XX_GPIO_REG_SET); - } else if (mask_clr & RB750_LVC573_LE) { - void __iomem *base = ar71xx_gpio_base; - - latch_oe = __raw_readl(base + AR71XX_GPIO_REG_OE); - __raw_writel(RB750_LVC573_LE, base + AR71XX_GPIO_REG_CLEAR); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_CLEAR); - } - - ret = 1; - -unlock: - spin_unlock_irqrestore(&lock, flags); - return ret; -} -EXPORT_SYMBOL_GPL(rb750_latch_change); - -static void __init rb750_setup(void) -{ - ar71xx_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); - - ar71xx_add_device_mdio(0, 0x0); - - /* LAN ports */ - ar71xx_add_device_eth(1); - - /* WAN port */ - ar71xx_add_device_eth(0); - - platform_device_register(&rb750_leds_device); - platform_device_register(&rb750_nand_device); -} - -MIPS_MACHINE(AR71XX_MACH_RB_750, "750i", "MikroTik RouterBOARD 750", - rb750_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rw2458n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rw2458n.c deleted file mode 100644 index 02b655f13..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rw2458n.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Redwave RW2458N support - * - * Copyright (C) 2011-2012 Cezary Jackiewicz <cezary@eko.one.pl> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define RW2458N_GPIO_LED_D3 1 -#define RW2458N_GPIO_LED_D4 0 -#define RW2458N_GPIO_LED_D5 11 -#define RW2458N_GPIO_LED_D6 7 -#define RW2458N_GPIO_BTN_RESET 12 - -#define RW2458N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define RW2458N_KEYS_DEBOUNCE_INTERVAL (3 * RW2458N_KEYS_POLL_INTERVAL) - -static struct gpio_keys_button rw2458n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RW2458N_KEYS_DEBOUNCE_INTERVAL, - .gpio = RW2458N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -#define RW2458N_WAN_PHYMASK BIT(4) - -static struct gpio_led rw2458n_leds_gpio[] __initdata = { - { - .name = "rw2458n:green:d3", - .gpio = RW2458N_GPIO_LED_D3, - .active_low = 1, - }, { - .name = "rw2458n:green:d4", - .gpio = RW2458N_GPIO_LED_D4, - .active_low = 1, - }, { - .name = "rw2458n:green:d5", - .gpio = RW2458N_GPIO_LED_D5, - .active_low = 1, - }, { - .name = "rw2458n:green:d6", - .gpio = RW2458N_GPIO_LED_D6, - .active_low = 1, - } -}; - -static const char *rw2458n_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data rw2458n_flash_data = { - .part_probes = rw2458n_part_probes, -}; - -static void __init rw2458n_setup(void) -{ - u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(&rw2458n_flash_data); - - ar71xx_add_device_mdio(0, ~RW2458N_WAN_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac2, 0); - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ap91_pci_init(ee, NULL); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rw2458n_leds_gpio), - rw2458n_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, RW2458N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rw2458n_gpio_keys), - rw2458n_gpio_keys); - - ar71xx_add_device_usb(); -} - -MIPS_MACHINE(AR71XX_MACH_RW2458N, "RW2458N", "Redwave RW2458N", - rw2458n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tew-632brp.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tew-632brp.c deleted file mode 100644 index b7f9cb683..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tew-632brp.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * TrendNET TEW-632BRP board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "nvram.h" - -#define TEW_632BRP_GPIO_LED_STATUS 1 -#define TEW_632BRP_GPIO_LED_WPS 3 -#define TEW_632BRP_GPIO_LED_WLAN 6 -#define TEW_632BRP_GPIO_BTN_WPS 12 -#define TEW_632BRP_GPIO_BTN_RESET 21 - -#define TEW_632BRP_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TEW_632BRP_KEYS_DEBOUNCE_INTERVAL (3 * TEW_632BRP_KEYS_POLL_INTERVAL) - -#define TEW_632BRP_CONFIG_ADDR 0x1f020000 -#define TEW_632BRP_CONFIG_SIZE 0x10000 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition tew_632brp_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "config", - .offset = 0x020000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x030000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x110000, - .size = 0x2e0000, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x030000, - .size = 0x3c0000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data tew_632brp_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = tew_632brp_partitions, - .nr_parts = ARRAY_SIZE(tew_632brp_partitions), -#endif -}; - -static struct gpio_led tew_632brp_leds_gpio[] __initdata = { - { - .name = "tew-632brp:green:status", - .gpio = TEW_632BRP_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "tew-632brp:blue:wps", - .gpio = TEW_632BRP_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "tew-632brp:green:wlan", - .gpio = TEW_632BRP_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tew_632brp_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_632BRP_GPIO_BTN_RESET, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_632BRP_GPIO_BTN_WPS, - } -}; - -#define TEW_632BRP_LAN_PHYMASK BIT(0) -#define TEW_632BRP_WAN_PHYMASK BIT(4) -#define TEW_632BRP_MDIO_MASK (~(TEW_632BRP_LAN_PHYMASK | \ - TEW_632BRP_WAN_PHYMASK)) - -static void __init tew_632brp_setup(void) -{ - const char *config = (char *) KSEG1ADDR(TEW_632BRP_CONFIG_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - u8 *wlan_mac = NULL; - - if (nvram_parse_mac_addr(config, TEW_632BRP_CONFIG_SIZE, - "lan_mac=", mac) == 0) { - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); - wlan_mac = mac; - } - - ar71xx_add_device_mdio(0, TEW_632BRP_MDIO_MASK); - - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.phy_mask = TEW_632BRP_LAN_PHYMASK; - - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = TEW_632BRP_WAN_PHYMASK; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&tew_632brp_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tew_632brp_leds_gpio), - tew_632brp_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, TEW_632BRP_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tew_632brp_gpio_keys), - tew_632brp_gpio_keys); - - ar9xxx_add_device_wmac(eeprom, wlan_mac); -} - -MIPS_MACHINE(AR71XX_MACH_TEW_632BRP, "TEW-632BRP", "TRENDnet TEW-632BRP", - tew_632brp_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3020.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3020.c deleted file mode 100644 index 6af58d1a5..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3020.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * TP-LINK TL-MR3020 board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" - -#define TL_MR3020_GPIO_LED_3G 27 -#define TL_MR3020_GPIO_LED_WLAN 0 -#define TL_MR3020_GPIO_LED_LAN 17 -#define TL_MR3020_GPIO_LED_WPS 26 - -#define TL_MR3020_GPIO_BTN_WPS 11 -#define TL_MR3020_GPIO_BTN_SW1 18 -#define TL_MR3020_GPIO_BTN_SW2 20 - -#define TL_MR3020_GPIO_USB_POWER 8 - -#define TL_MR3020_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR3020_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3020_KEYS_POLL_INTERVAL) - -static const char *tl_mr3020_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr3020_flash_data = { - .part_probes = tl_mr3020_part_probes, -}; - -static struct gpio_led tl_mr3020_leds_gpio[] __initdata = { - { - .name = "tp-link:green:3g", - .gpio = TL_MR3020_GPIO_LED_3G, - .active_low = 1, - }, - { - .name = "tp-link:green:wlan", - .gpio = TL_MR3020_GPIO_LED_WLAN, - .active_low = 0, - }, - { - .name = "tp-link:green:lan", - .gpio = TL_MR3020_GPIO_LED_LAN, - .active_low = 1, - }, - { - .name = "tp-link:green:wps", - .gpio = TL_MR3020_GPIO_LED_WPS, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_mr3020_gpio_keys[] __initdata = { - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "sw1", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_SW1, - .active_low = 1, - }, - { - .desc = "sw2", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_SW2, - .active_low = 1, - } -}; - -static void __init tl_mr3020_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(&tl_mr3020_flash_data); - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), - tl_mr3020_leds_gpio); - ar71xx_register_gpio_keys_polled(-1, TL_MR3020_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3020_gpio_keys), - tl_mr3020_gpio_keys); - - gpio_request(TL_MR3020_GPIO_USB_POWER, "USB power"); - gpio_direction_output(TL_MR3020_GPIO_USB_POWER, 1); - ar71xx_add_device_usb(); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - - ar71xx_add_device_mdio(0, 0x0); - ar71xx_add_device_eth(0); - - ar9xxx_add_device_wmac(ee, mac); -} - -MIPS_MACHINE(AR71XX_MACH_TL_MR3020, "TL-MR3020", "TP-LINK TL-MR3020 v1", - tl_mr3020_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3x20.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3x20.c deleted file mode 100644 index 5ee25d346..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3x20.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * TP-LINK TL-MR3220/3420 board support - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define TL_MR3X20_GPIO_LED_QSS 0 -#define TL_MR3X20_GPIO_LED_SYSTEM 1 -#define TL_MR3X20_GPIO_LED_3G 8 - -#define TL_MR3X20_GPIO_BTN_RESET 11 -#define TL_MR3X20_GPIO_BTN_QSS 12 - -#define TL_MR3X20_GPIO_USB_POWER 6 - -#define TL_MR3X20_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR3X20_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3X20_KEYS_POLL_INTERVAL) - -static const char *tl_mr3x20_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr3x20_flash_data = { - .part_probes = tl_mr3x20_part_probes, -}; - -static struct gpio_led tl_mr3x20_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_MR3X20_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_MR3X20_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:3g", - .gpio = TL_MR3X20_GPIO_LED_3G, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_mr3x20_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3X20_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3X20_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_ap99_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(&tl_mr3x20_flash_data); - - ar71xx_register_gpio_keys_polled(-1, TL_MR3X20_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3x20_gpio_keys), - tl_mr3x20_gpio_keys); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, -1); - - ar71xx_add_device_mdio(0, 0x0); - - /* LAN ports */ - ar71xx_add_device_eth(1); - /* WAN port */ - ar71xx_add_device_eth(0); - - ap91_pci_init(ee, mac); -} - -static void __init tl_mr3x20_usb_setup(void) -{ - /* enable power for the USB port */ - gpio_request(TL_MR3X20_GPIO_USB_POWER, "USB power"); - gpio_direction_output(TL_MR3X20_GPIO_USB_POWER, 1); - - ar71xx_add_device_usb(); -} - -static void __init tl_mr3220_setup(void) -{ - tl_ap99_setup(); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), - tl_mr3x20_leds_gpio); - ap91_pci_setup_wmac_led_pin(1); - tl_mr3x20_usb_setup(); -} - -MIPS_MACHINE(AR71XX_MACH_TL_MR3220, "TL-MR3220", "TP-LINK TL-MR3220", - tl_mr3220_setup); - -static void __init tl_mr3420_setup(void) -{ - tl_ap99_setup(); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), - tl_mr3x20_leds_gpio); - ap91_pci_setup_wmac_led_pin(0); - tl_mr3x20_usb_setup(); -} - -MIPS_MACHINE(AR71XX_MACH_TL_MR3420, "TL-MR3420", "TP-LINK TL-MR3420", - tl_mr3420_setup); - -static void __init tl_wr841n_v7_setup(void) -{ - tl_ap99_setup(); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio) - 1, - tl_mr3x20_leds_gpio); - ap91_pci_setup_wmac_led_pin(0); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WR841N_V7, "TL-WR841N-v7", - "TP-LINK TL-WR841N/ND v7", tl_wr841n_v7_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wa901nd-v2.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wa901nd-v2.c deleted file mode 100644 index 7d9bbee83..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wa901nd-v2.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * TP-LINK TL-WA901ND v2 board support - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2010 Pieter Hollants <pieter@hollants.com> - * Copyright (C) 2011 Jonathan Bennett <jbscience87@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-ar9xxx-wmac.h" - -#define TL_WA901ND_V2_GPIO_LED_QSS 4 -#define TL_WA901ND_V2_GPIO_LED_SYSTEM 2 -#define TL_WA901ND_V2_GPIO_LED_WLAN 9 - - -#define TL_WA901ND_V2_GPIO_BTN_RESET 3 -#define TL_WA901ND_V2_GPIO_BTN_QSS 7 - -#define TL_WA901ND_V2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL \ - (3 * TL_WA901ND_V2_KEYS_POLL_INTERVAL) - -static const char *tl_wa901nd_v2_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wa901nd_v2_flash_data = { - .part_probes = tl_wa901nd_v2_part_probes, -}; - -static struct gpio_led tl_wa901nd_v2_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WA901ND_V2_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WA901ND_V2_GPIO_LED_QSS, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WA901ND_V2_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wa901nd_v2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_V2_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_V2_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_wa901nd_v2_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = 0x00001000; - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_eth0_data.reset_bit = RESET_MODULE_GE0_MAC | - RESET_MODULE_GE0_PHY; - ar71xx_add_device_eth(0); - - ar71xx_add_device_m25p80(&tl_wa901nd_v2_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_v2_leds_gpio), - tl_wa901nd_v2_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, TL_WA901ND_V2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wa901nd_v2_gpio_keys), - tl_wa901nd_v2_gpio_keys); - - ar9xxx_add_device_wmac(eeprom, mac); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WA901ND_V2, "TL-WA901ND-v2", - "TP-LINK TL-WA901ND v2", tl_wa901nd_v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wa901nd.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wa901nd.c deleted file mode 100644 index 056f35ab7..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wa901nd.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * TP-LINK TL-WA901ND board support - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2010 Pieter Hollants <pieter@hollants.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define TL_WA901ND_GPIO_LED_QSS 0 -#define TL_WA901ND_GPIO_LED_SYSTEM 1 -#define TL_WA901ND_GPIO_LED_LAN 13 - -#define TL_WA901ND_GPIO_BTN_RESET 11 -#define TL_WA901ND_GPIO_BTN_QSS 12 - -#define TL_WA901ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WA901ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA901ND_KEYS_POLL_INTERVAL) - -static const char *tl_wa901nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wa901nd_flash_data = { - .part_probes = tl_wa901nd_part_probes, -}; - -static struct gpio_led tl_wa901nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan", - .gpio = TL_WA901ND_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WA901ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WA901ND_GPIO_LED_QSS, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wa901nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_wa901nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - /* - * ar71xx_eth0 would be the WAN port, but is not connected on - * the TL-WA901ND. ar71xx_eth1 connects to the internal switch chip, - * however we have a single LAN port only. - */ - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 0); - ar71xx_add_device_mdio(0, 0x0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&tl_wa901nd_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_leds_gpio), - tl_wa901nd_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, TL_WA901ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wa901nd_gpio_keys), - tl_wa901nd_gpio_keys); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WA901ND, "TL-WA901ND", "TP-LINK TL-WA901ND", - tl_wa901nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c deleted file mode 100644 index 3a844b774..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * TP-LINK TL-WR1043ND board support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/rtl8366.h> -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define TL_WR1043ND_GPIO_LED_USB 1 -#define TL_WR1043ND_GPIO_LED_SYSTEM 2 -#define TL_WR1043ND_GPIO_LED_QSS 5 -#define TL_WR1043ND_GPIO_LED_WLAN 9 - -#define TL_WR1043ND_GPIO_BTN_RESET 3 -#define TL_WR1043ND_GPIO_BTN_QSS 7 - -#define TL_WR1043ND_GPIO_RTL8366_SDA 18 -#define TL_WR1043ND_GPIO_RTL8366_SCK 19 - -#define TL_WR1043ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr1043nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr1043nd_flash_data = { - .part_probes = tl_wr1043nd_part_probes, -}; - -static struct gpio_led tl_wr1043nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:usb", - .gpio = TL_WR1043ND_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR1043ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR1043ND_GPIO_LED_QSS, - .active_low = 0, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR1043ND_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr1043nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static struct rtl8366_platform_data tl_wr1043nd_rtl8366rb_data = { - .gpio_sda = TL_WR1043ND_GPIO_RTL8366_SDA, - .gpio_sck = TL_WR1043ND_GPIO_RTL8366_SCK, -}; - -static struct platform_device tl_wr1043nd_rtl8366rb_device = { - .name = RTL8366RB_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &tl_wr1043nd_rtl8366rb_data, - } -}; - -static void __init tl_wr1043nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev; - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_pll_data.pll_1000 = 0x1a000000; - - ar71xx_add_device_eth(0); - - ar71xx_add_device_usb(); - - ar71xx_add_device_m25p80(&tl_wr1043nd_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr1043nd_leds_gpio), - tl_wr1043nd_leds_gpio); - - platform_device_register(&tl_wr1043nd_rtl8366rb_device); - - ar71xx_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr1043nd_gpio_keys), - tl_wr1043nd_gpio_keys); - - ar9xxx_add_device_wmac(eeprom, mac); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WR1043ND, "TL-WR1043ND", "TP-LINK TL-WR1043ND", - tl_wr1043nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr2543n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr2543n.c deleted file mode 100644 index c547b7392..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr2543n.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * TP-LINK TL-WR2543ND board support - * - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/rtl8367.h> -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ap91-pci.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define TL_WR2543N_GPIO_LED_WPS 0 -#define TL_WR2543N_GPIO_LED_USB 8 - -#define TL_WR2543N_GPIO_BTN_RESET 11 -#define TL_WR2543N_GPIO_BTN_WPS 12 - -#define TL_WR2543N_GPIO_RTL8367_SDA 1 -#define TL_WR2543N_GPIO_RTL8367_SCK 6 - -#define TL_WR2543N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR2543N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR2543N_KEYS_POLL_INTERVAL) - -static const char *tl_wr2543n_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr2543n_flash_data = { - .part_probes = tl_wr2543n_part_probes, - .max_read_len = 64, -}; - -static struct gpio_led tl_wr2543n_leds_gpio[] __initdata = { - { - .name = "tp-link:green:usb", - .gpio = TL_WR2543N_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "tp-link:green:wps", - .gpio = TL_WR2543N_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr2543n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR2543N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR2543N_GPIO_BTN_WPS, - } -}; - -static struct rtl8367_extif_config tl_wr2543n_rtl8367_extif0_cfg = { - .mode = RTL8367_EXTIF_MODE_RGMII, - .txdelay = 1, - .rxdelay = 0, - .ability = { - .force_mode = 1, - .txpause = 1, - .rxpause = 1, - .link = 1, - .duplex = 1, - .speed = RTL8367_PORT_SPEED_1000, - }, -}; - -static struct rtl8367_platform_data tl_wr2543n_rtl8367_data = { - .gpio_sda = TL_WR2543N_GPIO_RTL8367_SDA, - .gpio_sck = TL_WR2543N_GPIO_RTL8367_SCK, - .extif0_cfg = &tl_wr2543n_rtl8367_extif0_cfg, -}; - -static struct platform_device tl_wr2543n_rtl8367_device = { - .name = RTL8367_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &tl_wr2543n_rtl8367_data, - } -}; - -static void __init tl_wr2543n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(&tl_wr2543n_flash_data); - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr2543n_leds_gpio), - tl_wr2543n_leds_gpio); - ar71xx_register_gpio_keys_polled(-1, TL_WR2543N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr2543n_gpio_keys), - tl_wr2543n_gpio_keys); - ar71xx_add_device_usb(); - ap91_pci_init(eeprom, mac); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, -1); - ar71xx_eth0_data.mii_bus_dev = &tl_wr2543n_rtl8367_device.dev; - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_pll_data.pll_1000 = 0x1a000000; - - ar71xx_add_device_eth(0); - - platform_device_register(&tl_wr2543n_rtl8367_device); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WR2543N, "TL-WR2543N", "TP-LINK TL-WR2543N/ND", - tl_wr2543n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr703n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr703n.c deleted file mode 100644 index e9c2f25fe..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr703n.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * TP-LINK TL-WR703N board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" - -#define TL_WR703N_GPIO_LED_SYSTEM 27 -#define TL_WR703N_GPIO_BTN_RESET 11 - -#define TL_WR703N_GPIO_USB_POWER 8 - -#define TL_WR703N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR703N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR703N_KEYS_POLL_INTERVAL) - -static const char *tl_wr703n_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr703n_flash_data = { - .part_probes = tl_wr703n_part_probes, -}; - -static struct gpio_led tl_wr703n_leds_gpio[] __initdata = { - { - .name = "tp-link:blue:system", - .gpio = TL_WR703N_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr703n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR703N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR703N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init tl_wr703n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(&tl_wr703n_flash_data); - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), - tl_wr703n_leds_gpio); - ar71xx_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr703n_gpio_keys), - tl_wr703n_gpio_keys); - - gpio_request(TL_WR703N_GPIO_USB_POWER, "USB power"); - gpio_direction_output(TL_WR703N_GPIO_USB_POWER, 1); - ar71xx_add_device_usb(); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - - ar71xx_add_device_mdio(0, 0x0); - ar71xx_add_device_eth(0); - - ar9xxx_add_device_wmac(ee, mac); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WR703N, "TL-WR703N", "TP-LINK TL-WR703N v1", - tl_wr703n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr741nd-v4.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr741nd-v4.c deleted file mode 100644 index 8af72320c..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr741nd-v4.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * TP-LINK TL-WR741ND v4 board support - * - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" - -#define TL_WR741NDV4_GPIO_BTN_RESET 11 -#define TL_WR741NDV4_GPIO_BTN_WPS 26 - -#define TL_WR741NDV4_GPIO_LED_WLAN 0 -#define TL_WR741NDV4_GPIO_LED_QSS 1 -#define TL_WR741NDV4_GPIO_LED_WAN 13 -#define TL_WR741NDV4_GPIO_LED_LAN1 14 -#define TL_WR741NDV4_GPIO_LED_LAN2 15 -#define TL_WR741NDV4_GPIO_LED_LAN3 16 -#define TL_WR741NDV4_GPIO_LED_LAN4 17 - -#define TL_WR741NDV4_GPIO_LED_SYSTEM 27 - -#define TL_WR741NDV4_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741NDV4_KEYS_POLL_INTERVAL) - -static const char *tl_wr741ndv4_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr741ndv4_flash_data = { - .part_probes = tl_wr741ndv4_part_probes, -}; - -static struct gpio_led tl_wr741ndv4_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan1", - .gpio = TL_WR741NDV4_GPIO_LED_LAN1, - .active_low = 0, - }, { - .name = "tp-link:green:lan2", - .gpio = TL_WR741NDV4_GPIO_LED_LAN2, - .active_low = 0, - }, { - .name = "tp-link:green:lan3", - .gpio = TL_WR741NDV4_GPIO_LED_LAN3, - .active_low = 0, - }, { - .name = "tp-link:green:lan4", - .gpio = TL_WR741NDV4_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR741NDV4_GPIO_LED_QSS, - .active_low = 0, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR741NDV4_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:wan", - .gpio = TL_WR741NDV4_GPIO_LED_WAN, - .active_low = 0, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR741NDV4_GPIO_LED_WLAN, - .active_low = 0, - }, -}; - -static struct gpio_keys_button tl_wr741ndv4_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741NDV4_GPIO_BTN_RESET, - .active_low = 1, - } , { - .desc = "WPS", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741NDV4_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init tl_wr741ndv4_gmac_setup(void) -{ - void __iomem *base; - u32 t; - - base = ioremap(AR933X_GMAC_BASE, AR933X_GMAC_SIZE); - - t = __raw_readl(base + AR933X_GMAC_REG_ETH_CFG); - t |= (AR933X_ETH_CFG_SW_PHY_SWAP | AR933X_ETH_CFG_SW_PHY_ADDR_SWAP); - __raw_writel(t, base + AR933X_GMAC_REG_ETH_CFG); - - iounmap(base); -} - -static void __init tl_wr741ndv4_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - tl_wr741ndv4_gmac_setup(); - - ar71xx_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio), - tl_wr741ndv4_leds_gpio); - - ar71xx_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr741ndv4_gpio_keys), - tl_wr741ndv4_gpio_keys); - - ar71xx_add_device_m25p80(&tl_wr741ndv4_flash_data); - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, -1); - - ar71xx_add_device_mdio(0, 0x0); - ar71xx_add_device_eth(1); - ar71xx_add_device_eth(0); - - ar9xxx_add_device_wmac(ee, mac); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WR741ND_V4, "TL-WR741ND-v4", - "TP-LINK TL-WR741ND v4", tl_wr741ndv4_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr741nd.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr741nd.c deleted file mode 100644 index f877e9882..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr741nd.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * TP-LINK TL-WR741ND board support - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define TL_WR741ND_GPIO_LED_QSS 0 -#define TL_WR741ND_GPIO_LED_SYSTEM 1 -#define TL_WR741ND_GPIO_LED_LAN1 13 -#define TL_WR741ND_GPIO_LED_LAN2 14 -#define TL_WR741ND_GPIO_LED_LAN3 15 -#define TL_WR741ND_GPIO_LED_LAN4 16 -#define TL_WR741ND_GPIO_LED_WAN 17 - -#define TL_WR741ND_GPIO_BTN_RESET 11 -#define TL_WR741ND_GPIO_BTN_QSS 12 - -#define TL_WR741ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR741ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr741nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr741nd_flash_data = { - .part_probes = tl_wr741nd_part_probes, -}; - -static struct gpio_led tl_wr741nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan1", - .gpio = TL_WR741ND_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "tp-link:green:lan2", - .gpio = TL_WR741ND_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "tp-link:green:lan3", - .gpio = TL_WR741ND_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "tp-link:green:lan4", - .gpio = TL_WR741ND_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR741ND_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR741ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:wan", - .gpio = TL_WR741ND_GPIO_LED_WAN, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr741nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_wr741nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(&tl_wr741nd_flash_data); - - ar71xx_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr741nd_leds_gpio), - tl_wr741nd_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, TL_WR741ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr741nd_gpio_keys), - tl_wr741nd_gpio_keys); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, -1); - - ar71xx_add_device_mdio(0, 0x0); - - /* LAN ports */ - ar71xx_add_device_eth(1); - - /* WAN port */ - ar71xx_add_device_eth(0); - - ap91_pci_setup_wmac_led_pin(1); - - ap91_pci_init(ee, mac); -} -MIPS_MACHINE(AR71XX_MACH_TL_WR741ND, "TL-WR741ND", "TP-LINK TL-WR741ND", - tl_wr741nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr841n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr841n.c deleted file mode 100644 index 3871b7e07..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr841n.c +++ /dev/null @@ -1,145 +0,0 @@ -/* - * TP-LINK TL-WR841N board support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-dsa.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-pb42-pci.h" -#include "dev-leds-gpio.h" - -#define TL_WR841ND_V1_GPIO_LED_SYSTEM 2 -#define TL_WR841ND_V1_GPIO_LED_QSS_GREEN 4 -#define TL_WR841ND_V1_GPIO_LED_QSS_RED 5 - -#define TL_WR841ND_V1_GPIO_BTN_RESET 3 -#define TL_WR841ND_V1_GPIO_BTN_QSS 7 - -#define TL_WR841ND_V1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \ - (3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition tl_wr841n_v1_partitions[] = { - { - .name = "redboot", - .offset = 0, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x020000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x160000, - .size = 0x280000, - }, { - .name = "config", - .offset = 0x3e0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x020000, - .size = 0x3c0000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data tl_wr841n_v1_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = tl_wr841n_v1_partitions, - .nr_parts = ARRAY_SIZE(tl_wr841n_v1_partitions), -#endif -}; - -static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WR841ND_V1_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:red:qss", - .gpio = TL_WR841ND_V1_GPIO_LED_QSS_RED, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR841ND_V1_GPIO_LED_QSS_GREEN, - } -}; - -static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841ND_V1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841ND_V1_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static struct dsa_chip_data tl_wr841n_v1_dsa_chip = { - .port_names[0] = "wan", - .port_names[1] = "lan1", - .port_names[2] = "lan2", - .port_names[3] = "lan3", - .port_names[4] = "lan4", - .port_names[5] = "cpu", -}; - -static struct dsa_platform_data tl_wr841n_v1_dsa_data = { - .nr_chips = 1, - .chip = &tl_wr841n_v1_dsa_chip, -}; - -static void __init tl_wr841n_v1_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - ar71xx_add_device_dsa(&ar71xx_eth0_device.dev, &ar71xx_mdio0_device.dev, - &tl_wr841n_v1_dsa_data); - - ar71xx_add_device_m25p80(&tl_wr841n_v1_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio), - tl_wr841n_v1_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr841n_v1_gpio_keys), - tl_wr841n_v1_gpio_keys); - - pb42_pci_init(); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WR841N_V1, "TL-WR841N-v1.5", "TP-LINK TL-WR841N v1", - tl_wr841n_v1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr941nd.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr941nd.c deleted file mode 100644 index 14176b87a..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr941nd.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * TP-LINK TL-WR941ND board support - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-dsa.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define TL_WR941ND_GPIO_LED_SYSTEM 2 -#define TL_WR941ND_GPIO_LED_QSS_RED 4 -#define TL_WR941ND_GPIO_LED_QSS_GREEN 5 -#define TL_WR941ND_GPIO_LED_WLAN 9 - -#define TL_WR941ND_GPIO_BTN_RESET 3 -#define TL_WR941ND_GPIO_BTN_QSS 7 - -#define TL_WR941ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR941ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr941nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr941nd_flash_data = { - .part_probes = tl_wr941nd_part_probes, -}; - -static struct gpio_led tl_wr941nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WR941ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:red:qss", - .gpio = TL_WR941ND_GPIO_LED_QSS_RED, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR941ND_GPIO_LED_QSS_GREEN, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR941ND_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr941nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR941ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR941ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static struct dsa_chip_data tl_wr941nd_dsa_chip = { - .port_names[0] = "wan", - .port_names[1] = "lan1", - .port_names[2] = "lan2", - .port_names[3] = "lan3", - .port_names[4] = "lan4", - .port_names[5] = "cpu", -}; - -static struct dsa_platform_data tl_wr941nd_dsa_data = { - .nr_chips = 1, - .chip = &tl_wr941nd_dsa_chip, -}; - -static void __init tl_wr941nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - ar71xx_add_device_dsa(&ar71xx_eth0_device.dev, &ar71xx_mdio0_device.dev, - &tl_wr941nd_dsa_data); - - ar71xx_add_device_m25p80(&tl_wr941nd_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio), - tl_wr941nd_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr941nd_gpio_keys), - tl_wr941nd_gpio_keys); - ar9xxx_add_device_wmac(eeprom, mac); -} - -MIPS_MACHINE(AR71XX_MACH_TL_WR941ND, "TL-WR941ND", "TP-LINK TL-WR941ND", - tl_wr941nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ubnt.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ubnt.c deleted file mode 100644 index 8f1a1355d..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-ubnt.c +++ /dev/null @@ -1,357 +0,0 @@ -/* - * Ubiquiti RouterStation support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * Copyright (C) 2008 Ubiquiti <support@ubnt.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-pb42-pci.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define UBNT_RS_GPIO_LED_RF 2 -#define UBNT_RS_GPIO_SW4 8 - -#define UBNT_LS_SR71_GPIO_LED_D25 0 -#define UBNT_LS_SR71_GPIO_LED_D26 1 -#define UBNT_LS_SR71_GPIO_LED_D24 2 -#define UBNT_LS_SR71_GPIO_LED_D23 4 -#define UBNT_LS_SR71_GPIO_LED_D22 5 -#define UBNT_LS_SR71_GPIO_LED_D27 6 -#define UBNT_LS_SR71_GPIO_LED_D28 7 - -#define UBNT_M_GPIO_LED_L1 0 -#define UBNT_M_GPIO_LED_L2 1 -#define UBNT_M_GPIO_LED_L3 11 -#define UBNT_M_GPIO_LED_L4 7 -#define UBNT_M_GPIO_BTN_RESET 12 - -#define UBNT_KEYS_POLL_INTERVAL 20 /* msecs */ -#define UBNT_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_KEYS_POLL_INTERVAL) - -static struct gpio_led ubnt_rs_leds_gpio[] __initdata = { - { - .name = "ubnt:green:rf", - .gpio = UBNT_RS_GPIO_LED_RF, - .active_low = 0, - } -}; - -static struct gpio_led ubnt_ls_sr71_leds_gpio[] __initdata = { - { - .name = "ubnt:green:d22", - .gpio = UBNT_LS_SR71_GPIO_LED_D22, - .active_low = 0, - }, { - .name = "ubnt:green:d23", - .gpio = UBNT_LS_SR71_GPIO_LED_D23, - .active_low = 0, - }, { - .name = "ubnt:green:d24", - .gpio = UBNT_LS_SR71_GPIO_LED_D24, - .active_low = 0, - }, { - .name = "ubnt:red:d25", - .gpio = UBNT_LS_SR71_GPIO_LED_D25, - .active_low = 0, - }, { - .name = "ubnt:red:d26", - .gpio = UBNT_LS_SR71_GPIO_LED_D26, - .active_low = 0, - }, { - .name = "ubnt:green:d27", - .gpio = UBNT_LS_SR71_GPIO_LED_D27, - .active_low = 0, - }, { - .name = "ubnt:green:d28", - .gpio = UBNT_LS_SR71_GPIO_LED_D28, - .active_low = 0, - } -}; - -static struct gpio_led ubnt_m_leds_gpio[] __initdata = { - { - .name = "ubnt:red:link1", - .gpio = UBNT_M_GPIO_LED_L1, - .active_low = 0, - }, { - .name = "ubnt:orange:link2", - .gpio = UBNT_M_GPIO_LED_L2, - .active_low = 0, - }, { - .name = "ubnt:green:link3", - .gpio = UBNT_M_GPIO_LED_L3, - .active_low = 0, - }, { - .name = "ubnt:green:link4", - .gpio = UBNT_M_GPIO_LED_L4, - .active_low = 0, - } -}; - -static struct gpio_keys_button ubnt_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL, - .gpio = UBNT_RS_GPIO_SW4, - .active_low = 1, - } -}; - -static struct gpio_keys_button ubnt_m_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL, - .gpio = UBNT_M_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static const char *ubnt_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data ubnt_flash_data = { - .part_probes = ubnt_part_probes, -}; - -static void __init ubnt_generic_setup(void) -{ - ar71xx_add_device_m25p80(&ubnt_flash_data); - - ar71xx_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ubnt_gpio_keys), - ubnt_gpio_keys); - - pb42_pci_init(); -} - -/* - * There is Secondary MAC address duplicate problem with some UBNT HW batches. - * Do not increase Secondary MAC address by 1 but do workaround - * with 'Locally Administrated' bit. - */ -static void __init ubnt_init_secondary_mac(unsigned char *mac_base) -{ - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac_base, 0); - ar71xx_eth1_data.mac_addr[0] |= 0x02; -} - -#define UBNT_RS_WAN_PHYMASK BIT(20) -#define UBNT_RS_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) - -static void __init ubnt_rs_setup(void) -{ - ubnt_generic_setup(); - - ar71xx_add_device_mdio(0, ~(UBNT_RS_WAN_PHYMASK | UBNT_RS_LAN_PHYMASK)); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = UBNT_RS_WAN_PHYMASK; - - ubnt_init_secondary_mac(ar71xx_mac_base); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.speed = SPEED_100; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_usb(); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), - ubnt_rs_leds_gpio); -} - -MIPS_MACHINE(AR71XX_MACH_UBNT_RS, "UBNT-RS", "Ubiquiti RouterStation", - ubnt_rs_setup); - -#define UBNT_RSPRO_WAN_PHYMASK BIT(4) -#define UBNT_RSPRO_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) - -static void __init ubnt_rspro_setup(void) -{ - ubnt_generic_setup(); - - ar71xx_add_device_mdio(0, ~(UBNT_RSPRO_WAN_PHYMASK | - UBNT_RSPRO_LAN_PHYMASK)); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.phy_mask = UBNT_RSPRO_WAN_PHYMASK; - - ubnt_init_secondary_mac(ar71xx_mac_base); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = UBNT_RSPRO_LAN_PHYMASK; - ar71xx_eth1_data.speed = SPEED_1000; - ar71xx_eth1_data.duplex = DUPLEX_FULL; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_usb(); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), - ubnt_rs_leds_gpio); -} - -MIPS_MACHINE(AR71XX_MACH_UBNT_RSPRO, "UBNT-RSPRO", "Ubiquiti RouterStation Pro", - ubnt_rspro_setup); - -static void __init ubnt_lsx_setup(void) -{ - ubnt_generic_setup(); -} - -MIPS_MACHINE(AR71XX_MACH_UBNT_LSX, "UBNT-LSX", "Ubiquiti LSX", ubnt_lsx_setup); - -#define UBNT_LSSR71_PHY_MASK BIT(1) - -static void __init ubnt_lssr71_setup(void) -{ - ubnt_generic_setup(); - - ar71xx_add_device_mdio(0, ~UBNT_LSSR71_PHY_MASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = UBNT_LSSR71_PHY_MASK; - - ar71xx_add_device_eth(0); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_ls_sr71_leds_gpio), - ubnt_ls_sr71_leds_gpio); -} - -MIPS_MACHINE(AR71XX_MACH_UBNT_LSSR71, "UBNT-LS-SR71", "Ubiquiti LS-SR71", - ubnt_lssr71_setup); - -#define UBNT_M_WAN_PHYMASK BIT(4) - -static void __init ubnt_m_setup(void) -{ - u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(NULL); - - ar71xx_add_device_mdio(0, ~UBNT_M_WAN_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac2, 0); - ar71xx_add_device_eth(0); - - ap91_pci_init(ee, NULL); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_m_leds_gpio), - ubnt_m_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ubnt_m_gpio_keys), - ubnt_m_gpio_keys); -} - -static void __init ubnt_rocket_m_setup(void) -{ - ubnt_m_setup(); - ar71xx_add_device_usb(); -} - -MIPS_MACHINE(AR71XX_MACH_UBNT_BULLET_M, "UBNT-BM", "Ubiquiti Bullet M", - ubnt_m_setup); -MIPS_MACHINE(AR71XX_MACH_UBNT_ROCKET_M, "UBNT-RM", "Ubiquiti Rocket M", - ubnt_rocket_m_setup); - -/* TODO detect the second ethernet port and use one - init function for all Ubiquiti MIMO series products */ -static void __init ubnt_nano_m_setup(void) -{ - ubnt_m_setup(); - ar71xx_add_device_eth(1); -} - -MIPS_MACHINE(AR71XX_MACH_UBNT_NANO_M, "UBNT-NM", "Ubiquiti Nanostation M", - ubnt_nano_m_setup); - -static struct gpio_led ubnt_airrouter_leds_gpio[] __initdata = { - { - .name = "ubnt:green:globe", - .gpio = 0, - .active_low = 1, - } -}; - -static void __init ubnt_airrouter_setup(void) -{ - u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(NULL); - ar71xx_add_device_mdio(0, ~UBNT_M_WAN_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 0); - ubnt_init_secondary_mac(mac1); - - ar71xx_add_device_eth(1); - ar71xx_add_device_eth(0); - ar71xx_add_device_usb(); - - ap91_pci_init(ee, NULL); - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_airrouter_leds_gpio), - ubnt_airrouter_leds_gpio); -} - -MIPS_MACHINE(AR71XX_MACH_UBNT_AIRROUTER, "UBNT-AR", "Ubiquiti AirRouter", - ubnt_airrouter_setup); - -static struct gpio_led ubnt_unifi_leds_gpio[] __initdata = { - { - .name = "ubnt:orange:dome", - .gpio = 1, - .active_low = 0, - }, { - .name = "ubnt:green:dome", - .gpio = 0, - .active_low = 0, - } -}; - -static void __init ubnt_unifi_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_m25p80(NULL); - - ar71xx_add_device_mdio(0, ~UBNT_M_WAN_PHYMASK); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_add_device_eth(0); - - ap91_pci_init(ee, NULL); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_leds_gpio), - ubnt_unifi_leds_gpio); -} - -MIPS_MACHINE(AR71XX_MACH_UBNT_UNIFI, "UBNT-UF", "Ubiquiti UniFi", - ubnt_unifi_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-whr-hp-g300n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-whr-hp-g300n.c deleted file mode 100644 index ccc36507d..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-whr-hp-g300n.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Buffalo WHR-HP-G300N board support - * - * based on ... - * - * TP-LINK TL-WR741ND board support - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define WHRHPG300N_GPIO_LED_SECURITY 0 -#define WHRHPG300N_GPIO_LED_DIAG 1 -#define WHRHPG300N_GPIO_LED_ROUTER 6 - -#define WHRHPG300N_GPIO_BTN_ROUTER_ON 7 -#define WHRHPG300N_GPIO_BTN_ROUTER_AUTO 8 -#define WHRHPG300N_GPIO_BTN_RESET 11 -#define WHRHPG300N_GPIO_BTN_AOSS 12 - -#define WHRHPG300N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WHRHPG300N_KEYS_DEBOUNCE_INTERVAL (3 * WHRHPG300N_KEYS_POLL_INTERVAL) - -#define WHRHPG300N_MAC_OFFSET 0x20c - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition whrhpg300n_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x03e000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x03e000, - .size = 0x002000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x040000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x120000, - .size = 0x2c0000, - }, { - .name = "user_property", - .offset = 0x3e0000, - .size = 0x010000, - }, { - .name = "ART", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x040000, - .size = 0x3a0000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data whrhpg300n_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = whrhpg300n_partitions, - .nr_parts = ARRAY_SIZE(whrhpg300n_partitions), -#endif -}; - -static struct gpio_led whrhpg300n_leds_gpio[] __initdata = { - { - .name = "buffalo:orange:security", - .gpio = WHRHPG300N_GPIO_LED_SECURITY, - .active_low = 1, - }, { - .name = "buffalo:red:diag", - .gpio = WHRHPG300N_GPIO_LED_DIAG, - .active_low = 1, - }, { - .name = "buffalo:green:router", - .gpio = WHRHPG300N_GPIO_LED_ROUTER, - .active_low = 1, - } -}; - -static struct gpio_keys_button whrhpg300n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .gpio = WHRHPG300N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "aoss/wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .gpio = WHRHPG300N_GPIO_BTN_AOSS, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_2, - .gpio = WHRHPG300N_GPIO_BTN_ROUTER_ON, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - }, { - .desc = "router_auto", - .type = EV_KEY, - .code = BTN_3, - .gpio = WHRHPG300N_GPIO_BTN_ROUTER_AUTO, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - } -}; - -static void __init whrhpg300n_setup(void) -{ - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - u8 *mac = (u8 *) KSEG1ADDR(ee + WHRHPG300N_MAC_OFFSET); - - ar71xx_add_device_m25p80(&whrhpg300n_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(whrhpg300n_leds_gpio), - whrhpg300n_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WHRHPG300N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(whrhpg300n_gpio_keys), - whrhpg300n_gpio_keys); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); - - ar71xx_add_device_mdio(0, 0x0); - - /* LAN ports */ - ar71xx_add_device_eth(1); - /* WAN port */ - ar71xx_add_device_eth(0); - - ap91_pci_setup_wmac_led_pin(1); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(AR71XX_MACH_WHR_HP_G300N, "WHR-HP-G300N", "Buffalo WHR-HP-G300N", - whrhpg300n_setup); - -MIPS_MACHINE(AR71XX_MACH_WHR_G301N, "WHR-G301N", "Buffalo WHR-G301N", - whrhpg300n_setup); - -MIPS_MACHINE(AR71XX_MACH_WHR_HP_GN, "WHR-HP-GN", "Buffalo WHR-HP-GN", - whrhpg300n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wndr3700.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wndr3700.c deleted file mode 100644 index c708b97d9..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wndr3700.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Netgear WNDR3700 board support - * - * Copyright (C) 2009 Marco Porsch - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/delay.h> -#include <linux/rtl8366.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap94-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define WNDR3700_GPIO_LED_WPS_ORANGE 0 -#define WNDR3700_GPIO_LED_POWER_ORANGE 1 -#define WNDR3700_GPIO_LED_POWER_GREEN 2 -#define WNDR3700_GPIO_LED_WPS_GREEN 4 -#define WNDR3700_GPIO_LED_WAN_GREEN 6 - -#define WNDR3700_GPIO_BTN_WPS 3 -#define WNDR3700_GPIO_BTN_RESET 8 -#define WNDR3700_GPIO_BTN_WIFI 11 - -#define WNDR3700_GPIO_RTL8366_SDA 5 -#define WNDR3700_GPIO_RTL8366_SCK 7 - -#define WNDR3700_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNDR3700_KEYS_DEBOUNCE_INTERVAL (3 * WNDR3700_KEYS_POLL_INTERVAL) - -#define WNDR3700_ETH0_MAC_OFFSET 0 -#define WNDR3700_ETH1_MAC_OFFSET 0x6 - -#define WNDR3700_WMAC0_MAC_OFFSET 0 -#define WNDR3700_WMAC1_MAC_OFFSET 0xc -#define WNDR3700_CALDATA0_OFFSET 0x1000 -#define WNDR3700_CALDATA1_OFFSET 0x5000 - -static struct gpio_led wndr3700_leds_gpio[] __initdata = { - { - .name = "wndr3700:green:power", - .gpio = WNDR3700_GPIO_LED_POWER_GREEN, - .active_low = 1, - }, { - .name = "wndr3700:orange:power", - .gpio = WNDR3700_GPIO_LED_POWER_ORANGE, - .active_low = 1, - }, { - .name = "wndr3700:green:wps", - .gpio = WNDR3700_GPIO_LED_WPS_GREEN, - .active_low = 1, - }, { - .name = "wndr3700:orange:wps", - .gpio = WNDR3700_GPIO_LED_WPS_ORANGE, - .active_low = 1, - }, { - .name = "wndr3700:green:wan", - .gpio = WNDR3700_GPIO_LED_WAN_GREEN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wndr3700_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "wifi", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_WIFI, - .active_low = 1, - } -}; - -static struct rtl8366_platform_data wndr3700_rtl8366s_data = { - .gpio_sda = WNDR3700_GPIO_RTL8366_SDA, - .gpio_sck = WNDR3700_GPIO_RTL8366_SCK, -}; - -static struct platform_device wndr3700_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wndr3700_rtl8366s_data, - } -}; - -/* - * The eth0 and wmac0 interfaces share the same MAC address which - * can lead to problems if operated unbridged. Set the locally - * administered bit on the eth0 MAC to make it unique. - */ - -static void __init wndr3700_init_local_mac(unsigned char *mac_base) -{ - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac_base, 0); - ar71xx_eth0_data.mac_addr[0] |= 0x02; -} - -static void __init wndr3700_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - wndr3700_init_local_mac(art + WNDR3700_ETH0_MAC_OFFSET); - ar71xx_eth0_pll_data.pll_1000 = 0x11110000; - ar71xx_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, - art + WNDR3700_ETH1_MAC_OFFSET, 0); - ar71xx_eth1_pll_data.pll_1000 = 0x11110000; - ar71xx_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = 0x10; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_usb(); - - ar71xx_add_device_m25p80(NULL); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio), - wndr3700_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WNDR3700_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wndr3700_gpio_keys), - wndr3700_gpio_keys); - - platform_device_register(&wndr3700_rtl8366s_device); - platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0); - - ap94_pci_setup_wmac_led_pin(0, 5); - ap94_pci_setup_wmac_led_pin(1, 5); - - /* 2.4 GHz uses the first fixed antenna group (1, 0, 1, 0) */ - ap94_pci_setup_wmac_gpio(0, (0xf << 6), (0xa << 6)); - - /* 5 GHz uses the second fixed antenna group (0, 1, 1, 0) */ - ap94_pci_setup_wmac_gpio(1, (0xf << 6), (0x6 << 6)); - - ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET, - art + WNDR3700_WMAC0_MAC_OFFSET, - art + WNDR3700_CALDATA1_OFFSET, - art + WNDR3700_WMAC1_MAC_OFFSET); -} - -MIPS_MACHINE(AR71XX_MACH_WNDR3700, "WNDR3700", - "NETGEAR WNDR3700/WNDR3800/WNDRMAC", - wndr3700_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wnr2000.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wnr2000.c deleted file mode 100644 index 37477eb22..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wnr2000.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * NETGEAR WNR2000 board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * Copyright (C) 2008-2009 Andy Boyett <agb@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define WNR2000_GPIO_LED_PWR_GREEN 14 -#define WNR2000_GPIO_LED_PWR_AMBER 7 -#define WNR2000_GPIO_LED_WPS 4 -#define WNR2000_GPIO_LED_WLAN 6 -#define WNR2000_GPIO_BTN_RESET 21 -#define WNR2000_GPIO_BTN_WPS 8 - -#define WNR2000_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNR2000_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition wnr2000_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x240000, - }, { - .name = "user-config", - .offset = 0x290000, - .size = 0x010000, - }, { - .name = "uImage", - .offset = 0x2a0000, - .size = 0x120000, - }, { - .name = "language_table", - .offset = 0x3c0000, - .size = 0x020000, - }, { - .name = "rootfs_checksum", - .offset = 0x3e0000, - .size = 0x010000, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data wnr2000_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = wnr2000_partitions, - .nr_parts = ARRAY_SIZE(wnr2000_partitions), -#endif -}; - -static struct gpio_led wnr2000_leds_gpio[] __initdata = { - { - .name = "wnr2000:green:power", - .gpio = WNR2000_GPIO_LED_PWR_GREEN, - .active_low = 1, - }, { - .name = "wnr2000:amber:power", - .gpio = WNR2000_GPIO_LED_PWR_AMBER, - .active_low = 1, - }, { - .name = "wnr2000:green:wps", - .gpio = WNR2000_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "wnr2000:blue:wlan", - .gpio = WNR2000_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wnr2000_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNR2000_GPIO_BTN_RESET, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNR2000_GPIO_BTN_WPS, - } -}; - -static void __init wnr2000_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.has_ar8216 = 1; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = 0x10; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&wnr2000_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio), - wnr2000_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wnr2000_gpio_keys), - wnr2000_gpio_keys); - - - ar9xxx_add_device_wmac(eeprom, NULL); -} - -MIPS_MACHINE(AR71XX_MACH_WNR2000, "WNR2000", "NETGEAR WNR2000", wnr2000_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wp543.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wp543.c deleted file mode 100644 index 3eb57119c..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wp543.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Compex WP543/WPJ543 board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-pb42-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define WP543_GPIO_SW6 2 -#define WP543_GPIO_LED_1 3 -#define WP543_GPIO_LED_2 4 -#define WP543_GPIO_LED_WLAN 5 -#define WP543_GPIO_LED_CONN 6 -#define WP543_GPIO_LED_DIAG 7 -#define WP543_GPIO_SW4 8 - -#define WP543_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WP543_KEYS_DEBOUNCE_INTERVAL (3 * WP543_KEYS_POLL_INTERVAL) - -static struct gpio_led wp543_leds_gpio[] __initdata = { - { - .name = "wp543:green:led1", - .gpio = WP543_GPIO_LED_1, - .active_low = 1, - }, { - .name = "wp543:green:led2", - .gpio = WP543_GPIO_LED_2, - .active_low = 1, - }, { - .name = "wp543:green:wlan", - .gpio = WP543_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "wp543:green:conn", - .gpio = WP543_GPIO_LED_CONN, - .active_low = 1, - }, { - .name = "wp543:green:diag", - .gpio = WP543_GPIO_LED_DIAG, - .active_low = 1, - } -}; - -static struct gpio_keys_button wp543_gpio_keys[] __initdata = { - { - .desc = "sw6", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, - .gpio = WP543_GPIO_SW6, - }, { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, - .gpio = WP543_GPIO_SW4, - } -}; - -static const char *wp543_part_probes[] = { - "MyLoader", - NULL, -}; - -static struct flash_platform_data wp543_flash_data = { - .part_probes = wp543_part_probes, -}; - -static void __init wp543_setup(void) -{ - ar71xx_add_device_m25p80(&wp543_flash_data); - - ar71xx_add_device_mdio(0, 0xfffffff0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ar71xx_eth0_data.phy_mask = 0x0f; - ar71xx_eth0_data.reset_bit = RESET_MODULE_GE0_MAC | - RESET_MODULE_GE0_PHY; - ar71xx_add_device_eth(0); - - ar71xx_add_device_usb(); - - pb42_pci_init(); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wp543_leds_gpio), - wp543_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WP543_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wp543_gpio_keys), - wp543_gpio_keys); -} - -MIPS_MACHINE(AR71XX_MACH_WP543, "WP543", "Compex WP543", wp543_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt160nl.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt160nl.c deleted file mode 100644 index 0cc560a40..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt160nl.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * Linksys WRT160NL board support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "nvram.h" - -#define WRT160NL_GPIO_LED_POWER 14 -#define WRT160NL_GPIO_LED_WPS_AMBER 9 -#define WRT160NL_GPIO_LED_WPS_BLUE 8 -#define WRT160NL_GPIO_LED_WLAN 6 - -#define WRT160NL_GPIO_BTN_WPS 7 -#define WRT160NL_GPIO_BTN_RESET 21 - -#define WRT160NL_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WRT160NL_KEYS_DEBOUNCE_INTERVAL (3 * WRT160NL_KEYS_POLL_INTERVAL) - -#define WRT160NL_NVRAM_ADDR 0x1f7e0000 -#define WRT160NL_NVRAM_SIZE 0x10000 - -static const char *wrt160nl_part_probes[] = { - "wrt160nl", - NULL, -}; - -static struct flash_platform_data wrt160nl_flash_data = { - .part_probes = wrt160nl_part_probes, -}; - -static struct gpio_led wrt160nl_leds_gpio[] __initdata = { - { - .name = "wrt160nl:blue:power", - .gpio = WRT160NL_GPIO_LED_POWER, - .active_low = 1, - .default_trigger = "default-on", - }, { - .name = "wrt160nl:amber:wps", - .gpio = WRT160NL_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, { - .name = "wrt160nl:blue:wps", - .gpio = WRT160NL_GPIO_LED_WPS_BLUE, - .active_low = 1, - }, { - .name = "wrt160nl:blue:wlan", - .gpio = WRT160NL_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wrt160nl_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, - .gpio = WRT160NL_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, - .gpio = WRT160NL_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init wrt160nl_setup(void) -{ - const char *nvram = (char *) KSEG1ADDR(WRT160NL_NVRAM_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - - if (nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, - "lan_hwaddr=", mac) == 0) { - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); - } - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.phy_mask = 0x01; - - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = 0x10; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&wrt160nl_flash_data); - - ar71xx_add_device_usb(); - - if (nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, - "wl0_hwaddr=", mac) == 0) - ar9xxx_add_device_wmac(eeprom, mac); - else - ar9xxx_add_device_wmac(eeprom, NULL); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wrt160nl_leds_gpio), - wrt160nl_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WRT160NL_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wrt160nl_gpio_keys), - wrt160nl_gpio_keys); - -} - -MIPS_MACHINE(AR71XX_MACH_WRT160NL, "WRT160NL", "Linksys WRT160NL", - wrt160nl_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt400n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt400n.c deleted file mode 100644 index 6d8d55faf..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt400n.c +++ /dev/null @@ -1,165 +0,0 @@ -/* - * Linksys WRT400N board support - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ap94-pci.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define WRT400N_GPIO_LED_POWER 1 -#define WRT400N_GPIO_LED_WPS_BLUE 4 -#define WRT400N_GPIO_LED_WPS_AMBER 5 -#define WRT400N_GPIO_LED_WLAN 6 - -#define WRT400N_GPIO_BTN_RESET 8 -#define WRT400N_GPIO_BTN_WLSEC 3 - -#define WRT400N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WRT400N_KEYS_DEBOUNE_INTERVAL (3 * WRT400N_KEYS_POLL_INTERVAL) - -#define WRT400N_MAC_ADDR_OFFSET 0x120c -#define WRT400N_CALDATA0_OFFSET 0x1000 -#define WRT400N_CALDATA1_OFFSET 0x5000 - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition wrt400n_partitions[] = { - { - .name = "uboot", - .offset = 0, - .size = 0x030000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "env", - .offset = 0x030000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "linux", - .offset = 0x040000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x180000, - .size = 0x630000, - }, { - .name = "nvram", - .offset = 0x7b0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "factory", - .offset = 0x7c0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "language", - .offset = 0x7d0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "caldata", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x040000, - .size = 0x770000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data wrt400n_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = wrt400n_partitions, - .nr_parts = ARRAY_SIZE(wrt400n_partitions), -#endif -}; - -static struct gpio_led wrt400n_leds_gpio[] __initdata = { - { - .name = "wrt400n:blue:wps", - .gpio = WRT400N_GPIO_LED_WPS_BLUE, - .active_low = 1, - }, { - .name = "wrt400n:amber:wps", - .gpio = WRT400N_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, { - .name = "wrt400n:blue:wlan", - .gpio = WRT400N_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "wrt400n:blue:power", - .gpio = WRT400N_GPIO_LED_POWER, - .active_low = 0, - .default_trigger = "default-on", - } -}; - -static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, - .gpio = WRT400N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wlsec", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, - .gpio = WRT400N_GPIO_BTN_WLSEC, - .active_low = 1, - } -}; - -static void __init wrt400n_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *mac = art + WRT400N_MAC_ADDR_OFFSET; - - ar71xx_add_device_mdio(0, 0x0); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth0_data.speed = SPEED_100; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 2); - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ar71xx_eth1_data.phy_mask = 0x10; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_m25p80(&wrt400n_flash_data); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio), - wrt400n_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wrt400n_gpio_keys), - wrt400n_gpio_keys); - - ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL, - art + WRT400N_CALDATA1_OFFSET, NULL); -} - -MIPS_MACHINE(AR71XX_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-ag300h.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-ag300h.c deleted file mode 100644 index d4ba62c84..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-ag300h.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - * Buffalo WZR-HP-AG300H board support - * - * Copyright (C) 2011 Felix Fietkau <nbd@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mips_machine.h> -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/gpio.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ap94-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" - -#define WZRHPAG300H_MAC_OFFSET 0x20c -#define WZRHPAG300H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPAG300H_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition wzrhpag300h_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x0060000, - .size = 0x0100000, - }, { - .name = "rootfs", - .offset = 0x0160000, - .size = 0x1e90000, - }, { - .name = "user_property", - .offset = 0x1ff0000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f90000, - } -}; - -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data wzrhpag300h_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = wzrhpag300h_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpag300h_flash_partitions), -#endif -}; - -static struct gpio_led wzrhpag300h_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 1, - .active_low = 1, - }, -}; - - -static struct gpio_keys_button wzrhpag300h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 11, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 3, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 5, - .active_low = 1, - }, { - .desc = "router_auto", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 6, - .active_low = 1, - }, { - .desc = "router_off", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 1, - } -}; - -static void __init wzrhpag300h_setup(void) -{ - u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1f051000); - u8 *eeprom2 = (u8 *) KSEG1ADDR(0x1f055000); - u8 *mac1 = eeprom1 + WZRHPAG300H_MAC_OFFSET; - u8 *mac2 = eeprom2 + WZRHPAG300H_MAC_OFFSET; - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac2, 1); - - ar71xx_add_device_mdio(0, ~(BIT(0) | BIT(4))); - - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.phy_mask = BIT(0); - - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = BIT(4); - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_usb(); - gpio_request(2, "usb"); - gpio_direction_output(2, 1); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wzrhpag300h_leds_gpio), - wzrhpag300h_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WZRHPAG300H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpag300h_gpio_keys), - wzrhpag300h_gpio_keys); - - ar71xx_add_device_m25p80_multi(&wzrhpag300h_flash_data); - - ap94_pci_init(eeprom1, mac1, eeprom2, mac2); -} - -MIPS_MACHINE(AR71XX_MACH_WZR_HP_AG300H, "WZR-HP-AG300H", - "Buffalo WZR-HP-AG300H", wzrhpag300h_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g300nh.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g300nh.c deleted file mode 100644 index 2eb742e4a..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g300nh.c +++ /dev/null @@ -1,292 +0,0 @@ -/* - * Buffalo WZR-HP-G300NH board support - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/nxp_74hc153.h> -#include <linux/rtl8366.h> - -#include <asm/mips_machine.h> -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/ar91xx_flash.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ar9xxx-wmac.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define WZRHPG300NH_GPIO_LED_USB 0 -#define WZRHPG300NH_GPIO_LED_DIAG 1 -#define WZRHPG300NH_GPIO_LED_WIRELESS 6 -#define WZRHPG300NH_GPIO_LED_SECURITY 17 -#define WZRHPG300NH_GPIO_LED_ROUTER 18 - -#define WZRHPG300NH_GPIO_RTL8366_SDA 19 -#define WZRHPG300NH_GPIO_RTL8366_SCK 20 - -#define WZRHPG300NH_GPIO_74HC153_S0 9 -#define WZRHPG300NH_GPIO_74HC153_S1 11 -#define WZRHPG300NH_GPIO_74HC153_1Y 12 -#define WZRHPG300NH_GPIO_74HC153_2Y 14 - -#define WZRHPG300NH_GPIO_EXP_BASE 32 -#define WZRHPG300NH_GPIO_BTN_AOSS (WZRHPG300NH_GPIO_EXP_BASE + 0) -#define WZRHPG300NH_GPIO_BTN_RESET (WZRHPG300NH_GPIO_EXP_BASE + 1) -#define WZRHPG300NH_GPIO_BTN_ROUTER_ON (WZRHPG300NH_GPIO_EXP_BASE + 2) -#define WZRHPG300NH_GPIO_BTN_QOS_ON (WZRHPG300NH_GPIO_EXP_BASE + 3) -#define WZRHPG300NH_GPIO_BTN_USB (WZRHPG300NH_GPIO_EXP_BASE + 5) -#define WZRHPG300NH_GPIO_BTN_ROUTER_AUTO (WZRHPG300NH_GPIO_EXP_BASE + 6) -#define WZRHPG300NH_GPIO_BTN_QOS_OFF (WZRHPG300NH_GPIO_EXP_BASE + 7) - -#define WZRHPG300NH_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH_KEYS_POLL_INTERVAL) - -#define WZRHPG300NH_MAC_OFFSET 0x20c - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition wzrhpg300nh_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x0060000, - .size = 0x0100000, - }, { - .name = "rootfs", - .offset = 0x0160000, - .size = 0x1e60000, - }, { - .name = "user_property", - .offset = 0x1fc0000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x1fe0000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f60000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct ar91xx_flash_platform_data wzrhpg300nh_flash_data = { - .width = 2, -#ifdef CONFIG_MTD_PARTITIONS - .parts = wzrhpg300nh_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg300nh_flash_partitions), -#endif -}; - -#define WZRHPG300NH_FLASH_BASE 0x1e000000 -#define WZRHPG300NH_FLASH_SIZE (32 * 1024 * 1024) - -static struct resource wzrhpg300nh_flash_resources[] = { - [0] = { - .start = WZRHPG300NH_FLASH_BASE, - .end = WZRHPG300NH_FLASH_BASE + WZRHPG300NH_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device wzrhpg300nh_flash_device = { - .name = "ar91xx-flash", - .id = -1, - .resource = wzrhpg300nh_flash_resources, - .num_resources = ARRAY_SIZE(wzrhpg300nh_flash_resources), - .dev = { - .platform_data = &wzrhpg300nh_flash_data, - } -}; - -static struct gpio_led wzrhpg300nh_leds_gpio[] __initdata = { - { - .name = "buffalo:orange:security", - .gpio = WZRHPG300NH_GPIO_LED_SECURITY, - .active_low = 1, - }, { - .name = "buffalo:green:wireless", - .gpio = WZRHPG300NH_GPIO_LED_WIRELESS, - .active_low = 1, - }, { - .name = "buffalo:green:router", - .gpio = WZRHPG300NH_GPIO_LED_ROUTER, - .active_low = 1, - }, { - .name = "buffalo:red:diag", - .gpio = WZRHPG300NH_GPIO_LED_DIAG, - .active_low = 1, - }, { - .name = "buffalo:blue:usb", - .gpio = WZRHPG300NH_GPIO_LED_USB, - .active_low = 1, - } -}; - -static struct gpio_keys_button wzrhpg300nh_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_AOSS, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_USB, - .active_low = 1, - }, { - .desc = "qos_on", - .type = EV_KEY, - .code = BTN_3, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_QOS_ON, - .active_low = 0, - }, { - .desc = "qos_off", - .type = EV_KEY, - .code = BTN_4, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_QOS_OFF, - .active_low = 0, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_ON, - .active_low = 0, - }, { - .desc = "router_auto", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_AUTO, - .active_low = 0, - } -}; - -static struct nxp_74hc153_platform_data wzrhpg300nh_74hc153_data = { - .gpio_base = WZRHPG300NH_GPIO_EXP_BASE, - .gpio_pin_s0 = WZRHPG300NH_GPIO_74HC153_S0, - .gpio_pin_s1 = WZRHPG300NH_GPIO_74HC153_S1, - .gpio_pin_1y = WZRHPG300NH_GPIO_74HC153_1Y, - .gpio_pin_2y = WZRHPG300NH_GPIO_74HC153_2Y, -}; - -static struct platform_device wzrhpg300nh_74hc153_device = { - .name = NXP_74HC153_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_74hc153_data, - } -}; - -static struct rtl8366_platform_data wzrhpg300nh_rtl8366_data = { - .gpio_sda = WZRHPG300NH_GPIO_RTL8366_SDA, - .gpio_sck = WZRHPG300NH_GPIO_RTL8366_SCK, -}; - -static struct platform_device wzrhpg300nh_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_rtl8366_data, - } -}; - -static struct platform_device wzrhpg300nh_rtl8366rb_device = { - .name = RTL8366RB_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_rtl8366_data, - } -}; - -static void __init wzrhpg300nh_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 *mac = eeprom + WZRHPG300NH_MAC_OFFSET; - bool hasrtl8366rb = false; - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); - - if (rtl8366_smi_detect(&wzrhpg300nh_rtl8366_data) == RTL8366_TYPE_RB) - hasrtl8366rb = true; - - if (hasrtl8366rb) { - ar71xx_eth0_pll_data.pll_1000 = 0x1f000000; - ar71xx_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; - ar71xx_eth1_pll_data.pll_1000 = 0x100; - ar71xx_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; - } else { - ar71xx_eth0_pll_data.pll_1000 = 0x1e000100; - ar71xx_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; - ar71xx_eth1_pll_data.pll_1000 = 0x1e000100; - ar71xx_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; - } - - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - - ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth1_data.phy_mask = 0x10; - - ar71xx_add_device_eth(0); - ar71xx_add_device_eth(1); - - ar71xx_add_device_usb(); - ar9xxx_add_device_wmac(eeprom, NULL); - - platform_device_register(&wzrhpg300nh_74hc153_device); - platform_device_register(&wzrhpg300nh_flash_device); - - if (hasrtl8366rb) - platform_device_register(&wzrhpg300nh_rtl8366rb_device); - else - platform_device_register(&wzrhpg300nh_rtl8366s_device); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh_leds_gpio), - wzrhpg300nh_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WZRHPG300NH_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg300nh_gpio_keys), - wzrhpg300nh_gpio_keys); - -} - -MIPS_MACHINE(AR71XX_MACH_WZR_HP_G300NH, "WZR-HP-G300NH", - "Buffalo WZR-HP-G300NH", wzrhpg300nh_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g300nh2.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g300nh2.c deleted file mode 100644 index ad1a0338b..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g300nh2.c +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Buffalo WZR-HP-G300NH2 board support - * - * Copyright (C) 2011 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2011 Mark Deneen <mdeneen@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mips_machine.h> -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/gpio.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" - - -#define WZRHPG300NH2_MAC_OFFSET 0x20c -#define WZRHPG300NH2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH2_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition wzrhpg300nh2_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x0060000, - .size = 0x0100000, - }, { - .name = "rootfs", - .offset = 0x0160000, - .size = 0x1e90000, - }, { - .name = "user_property", - .offset = 0x1ff0000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f90000, - } -}; - -#endif /* CONFIG_MTD_PARTITIONS */ - - - -static struct flash_platform_data wzrhpg300nh2_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = wzrhpg300nh2_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg300nh2_flash_partitions), -#endif -}; - - -static struct gpio_led wzrhpg300nh2_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 16, - .active_low = 1, - }, -}; - -static struct gpio_led wzrhpg300nh2_wmac_leds_gpio[] = { - { - .name = "buffalo:blue:usb", - .gpio = 4, - .active_low = 1, - }, - { - .name = "buffalo:orange:security", - .gpio = 6, - .active_low = 1, - }, - { - .name = "buffalo:green:router", - .gpio = 7, - .active_low = 1, - }, - { - .name = "buffalo:blue:movie_engine_on", - .gpio = 8, - .active_low = 1, - }, - { - .name = "buffalo:blue:movie_engine_off", - .gpio = 9, - .active_low = 1, - }, -}; - -/* The AOSS button is wmac gpio 12 */ -static struct gpio_keys_button wzrhpg300nh2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 1, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 1, - }, { - .desc = "qos", - .type = EV_KEY, - .code = BTN_3, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 11, - .active_low = 0, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 8, - .active_low = 0, - }, -}; - - -static void __init wzrhpg300nh2_setup(void) -{ - - u8 *eeprom = (u8 *) KSEG1ADDR(0x1f051000); - u8 *mac0 = eeprom + WZRHPG300NH2_MAC_OFFSET; - /* There is an eth1 but it is not connected to the switch */ - - ar71xx_add_device_m25p80_multi(&wzrhpg300nh2_flash_data); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac0, 0); - ar71xx_add_device_mdio(0, ~(BIT(0))); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac0, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.phy_mask = BIT(0); - - ar71xx_add_device_eth(0); - ar71xx_add_device_usb(); - /* gpio13 is usb power. Turn it on. */ - gpio_request(13, "usb"); - gpio_direction_output(13, 1); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh2_leds_gpio), - wzrhpg300nh2_leds_gpio); - ar71xx_register_gpio_keys_polled(-1, WZRHPG300NH2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg300nh2_gpio_keys), - wzrhpg300nh2_gpio_keys); - ap91_pci_setup_wmac_led_pin(5); - ap91_pci_setup_wmac_leds(wzrhpg300nh2_wmac_leds_gpio, - ARRAY_SIZE(wzrhpg300nh2_wmac_leds_gpio)); - - ap91_pci_init(eeprom, mac0); -} - -MIPS_MACHINE(AR71XX_MACH_WZR_HP_G300NH2, "WZR-HP-G300NH2", - "Buffalo WZR-HP-G300NH2", wzrhpg300nh2_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g450h.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g450h.c deleted file mode 100644 index 03376bb92..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g450h.c +++ /dev/null @@ -1,173 +0,0 @@ -/* - * Buffalo WZR-HP-G450G board support - * - * Copyright (C) 2011 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/gpio.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" - -#define WZRHPG450H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG450H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG450H_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition wzrhpg450h_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - }, { - .name = "ART", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "uImage", - .offset = 0x0060000, - .size = 0x0100000, - }, { - .name = "rootfs", - .offset = 0x0160000, - .size = 0x1e80000, - }, { - .name = "user_property", - .offset = 0x1fe0000, - .size = 0x0020000, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f80000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data wzrhpg450h_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = wzrhpg450h_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), -#endif -}; - -static struct gpio_led wzrhpg450h_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 14, - .active_low = 1, - }, - { - .name = "buffalo:orange:security", - .gpio = 13, - .active_low = 1, - }, -}; - - -static struct gpio_led wzrhpg450h_wmac_leds_gpio[] = { - { - .name = "buffalo:blue:movie_engine", - .gpio = 13, - .active_low = 1, - }, - { - .name = "buffalo:green:router", - .gpio = 14, - .active_low = 1, - }, -}; - -static struct gpio_keys_button wzrhpg450h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 6, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 1, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 8, - .active_low = 1, - }, { - .desc = "movie_engine", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 0, - }, { - .desc = "router_off", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 12, - .active_low = 0, - } -}; - - -static void __init wzrhpg450h_init(void) -{ - u8 *ee = (u8 *) KSEG1ADDR(0x1f051000); - u8 *mac = (u8 *) ee + 2; - - ar71xx_add_device_m25p80_multi(&wzrhpg450h_flash_data); - - ar71xx_add_device_mdio(0, ~BIT(0)); - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ar71xx_eth0_data.speed = SPEED_1000; - ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.phy_mask = BIT(0); - - ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wzrhpg450h_leds_gpio), - wzrhpg450h_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, WZRHPG450H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg450h_gpio_keys), - wzrhpg450h_gpio_keys); - - ar71xx_add_device_eth(0); - - ar71xx_add_device_usb(); - gpio_request(16, "usb"); - gpio_direction_output(16, 1); - - ap91_pci_init(ee, NULL); - ap91_pci_setup_wmac_led_pin(15); - ap91_pci_setup_wmac_leds(wzrhpg450h_wmac_leds_gpio, - ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio)); -} - -MIPS_MACHINE(AR71XX_MACH_WZR_HP_G450H, "WZR-HP-G450H", "Buffalo WZR-HP-G450H", - wzrhpg450h_init); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-zcn-1523h.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-zcn-1523h.c deleted file mode 100644 index 7828b37f5..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-zcn-1523h.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * Zcomax ZCN-1523H-2-8/5-16 board support - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" -#include "dev-m25p80.h" -#include "dev-ap91-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" - -#define ZCN_1523H_GPIO_BTN_RESET 0 -#define ZCN_1523H_GPIO_LED_INIT 11 -#define ZCN_1523H_GPIO_LED_LAN1 17 - -#define ZCN_1523H_2_GPIO_LED_WEAK 13 -#define ZCN_1523H_2_GPIO_LED_MEDIUM 14 -#define ZCN_1523H_2_GPIO_LED_STRONG 15 - -#define ZCN_1523H_5_GPIO_LED_UNKNOWN 1 -#define ZCN_1523H_5_GPIO_LED_LAN2 13 -#define ZCN_1523H_5_GPIO_LED_WEAK 14 -#define ZCN_1523H_5_GPIO_LED_MEDIUM 15 -#define ZCN_1523H_5_GPIO_LED_STRONG 16 - -#define ZCN_1523H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ZCN_1523H_KEYS_DEBOUNCE_INTERVAL (3 * ZCN_1523H_KEYS_POLL_INTERVAL) - -#ifdef CONFIG_MTD_PARTITIONS -static struct mtd_partition zcn_1523h_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x610000, - }, { - .name = "kernel", - .offset = 0x660000, - .size = 0x170000, - }, { - .name = "configure", - .offset = 0x7d0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "mfg", - .offset = 0x7e0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "eeprom", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x780000, - } -}; -#endif /* CONFIG_MTD_PARTITIONS */ - -static struct flash_platform_data zcn_1523h_flash_data = { -#ifdef CONFIG_MTD_PARTITIONS - .parts = zcn_1523h_partitions, - .nr_parts = ARRAY_SIZE(zcn_1523h_partitions), -#endif -}; - -static struct gpio_keys_button zcn_1523h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ZCN_1523H_KEYS_DEBOUNCE_INTERVAL, - .gpio = ZCN_1523H_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:amber:init", - .gpio = ZCN_1523H_GPIO_LED_INIT, - .active_low = 1, - }, { - .name = "zcn-1523h:green:lan1", - .gpio = ZCN_1523H_GPIO_LED_LAN1, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_2_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:red:weak", - .gpio = ZCN_1523H_2_GPIO_LED_WEAK, - .active_low = 1, - }, { - .name = "zcn-1523h:amber:medium", - .gpio = ZCN_1523H_2_GPIO_LED_MEDIUM, - .active_low = 1, - }, { - .name = "zcn-1523h:green:strong", - .gpio = ZCN_1523H_2_GPIO_LED_STRONG, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_5_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:red:weak", - .gpio = ZCN_1523H_5_GPIO_LED_WEAK, - .active_low = 1, - }, { - .name = "zcn-1523h:amber:medium", - .gpio = ZCN_1523H_5_GPIO_LED_MEDIUM, - .active_low = 1, - }, { - .name = "zcn-1523h:green:strong", - .gpio = ZCN_1523H_5_GPIO_LED_STRONG, - .active_low = 1, - }, { - .name = "zcn-1523h:green:lan2", - .gpio = ZCN_1523H_5_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "zcn-1523h:amber:unknown", - .gpio = ZCN_1523H_5_GPIO_LED_UNKNOWN, - } -}; - -static void __init zcn_1523h_generic_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0004); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ar71xx_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ar71xx_add_device_m25p80(&zcn_1523h_flash_data); - - ar71xx_add_device_leds_gpio(0, ARRAY_SIZE(zcn_1523h_leds_gpio), - zcn_1523h_leds_gpio); - - ar71xx_register_gpio_keys_polled(-1, ZCN_1523H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(zcn_1523h_gpio_keys), - zcn_1523h_gpio_keys); - - ap91_pci_init(ee, mac); - - ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); - ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); - - ar71xx_add_device_mdio(0, 0x0); - - /* LAN1 port */ - ar71xx_add_device_eth(0); -} - -static void __init zcn_1523h_2_setup(void) -{ - zcn_1523h_generic_setup(); - ap91_pci_setup_wmac_gpio(BIT(9), 0); - - ar71xx_add_device_leds_gpio(1, ARRAY_SIZE(zcn_1523h_2_leds_gpio), - zcn_1523h_2_leds_gpio); -} - -MIPS_MACHINE(AR71XX_MACH_ZCN_1523H_2, "ZCN-1523H-2", "Zcomax ZCN-1523H-2", - zcn_1523h_2_setup); - -static void __init zcn_1523h_5_setup(void) -{ - zcn_1523h_generic_setup(); - ap91_pci_setup_wmac_gpio(BIT(8), 0); - - ar71xx_add_device_leds_gpio(1, ARRAY_SIZE(zcn_1523h_5_leds_gpio), - zcn_1523h_5_leds_gpio); - - /* LAN2 port */ - ar71xx_add_device_eth(1); -} - -MIPS_MACHINE(AR71XX_MACH_ZCN_1523H_5, "ZCN-1523H-5", "Zcomax ZCN-1523H-5", - zcn_1523h_5_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/machtype.h b/target/linux/ar71xx/files/arch/mips/ar71xx/machtype.h deleted file mode 100644 index a66046a90..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/machtype.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Atheros AR71xx machine type definitions - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_MACHTYPE_H -#define _AR71XX_MACHTYPE_H - -#include <asm/mips_machine.h> - -enum ar71xx_mach_type { - AR71XX_MACH_GENERIC = 0, - AR71XX_MACH_ALFA_AP96, /* ALFA Network AP96 board */ - AR71XX_MACH_ALFA_NX, /* ALFA Network N2/N5 board */ - AR71XX_MACH_ALL0258N, /* Allnet ALL0258N */ - AR71XX_MACH_AP121, /* Atheros AP121 */ - AR71XX_MACH_AP121_MINI, /* Atheros AP121-MINI */ - AR71XX_MACH_AP81, /* Atheros AP81 */ - AR71XX_MACH_AP83, /* Atheros AP83 */ - AR71XX_MACH_AP96, /* Atheros AP96 */ - AR71XX_MACH_AW_NR580, /* AzureWave AW-NR580 */ - AR71XX_MACH_DB120, /* Atheros DB120 (AR934x based) */ - AR71XX_MACH_DIR_600_A1, /* D-Link DIR-600 rev. A1 */ - AR71XX_MACH_DIR_615_C1, /* D-Link DIR-615 rev. C1 */ - AR71XX_MACH_DIR_825_B1, /* D-Link DIR-825 rev. B1 */ - AR71XX_MACH_EAP7660D, /* Senao EAP7660D */ - AR71XX_MACH_JA76PF, /* jjPlus JA76PF */ - AR71XX_MACH_JWAP003, /* jjPlus JWAP003 */ - AR71XX_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */ - AR71XX_MACH_MZK_W04NU, /* Planex MZK-W04NU */ - AR71XX_MACH_MZK_W300NH, /* Planex MZK-W300NH */ - AR71XX_MACH_NBG460N, /* Zyxel NBG460N/550N/550NH */ - AR71XX_MACH_OM2P, /* OpenMesh OM2P */ - AR71XX_MACH_PB42, /* Atheros PB42 */ - AR71XX_MACH_PB44, /* Atheros PB44 */ - AR71XX_MACH_PB92, /* Atheros PB92 */ - AR71XX_MACH_RB_411, /* MikroTik RouterBOARD 411/411A/411AH */ - AR71XX_MACH_RB_411U, /* MikroTik RouterBOARD 411U */ - AR71XX_MACH_RB_433, /* MikroTik RouterBOARD 433/433AH */ - AR71XX_MACH_RB_433U, /* MikroTik RouterBOARD 433UAH */ - AR71XX_MACH_RB_450G, /* MikroTik RouterBOARD 450G */ - AR71XX_MACH_RB_450, /* MikroTik RouterBOARD 450 */ - AR71XX_MACH_RB_493, /* Mikrotik RouterBOARD 493/493AH */ - AR71XX_MACH_RB_493G, /* Mikrotik RouterBOARD 493G */ - AR71XX_MACH_RB_750, /* MikroTik RouterBOARD 750 */ - AR71XX_MACH_RW2458N, /* Redwave RW2458N */ - AR71XX_MACH_TEW_632BRP, /* TRENDnet TEW-632BRP */ - AR71XX_MACH_TL_MR3020, /* TP-LINK TL-MR3020 */ - AR71XX_MACH_TL_MR3220, /* TP-LINK TL-MR3220 */ - AR71XX_MACH_TL_MR3420, /* TP-LINK TL-MR3420 */ - AR71XX_MACH_TL_WA901ND, /* TP-LINK TL-WA901ND */ - AR71XX_MACH_TL_WA901ND_V2, /* TP-LINK TL-WA901ND v2 */ - AR71XX_MACH_TL_WR1043ND, /* TP-LINK TL-WR1041ND */ - AR71XX_MACH_TL_WR2543N, /* TP-LINK TL-WR2543N/ND */ - AR71XX_MACH_TL_WR703N, /* TP-LINK TL-WR703N */ - AR71XX_MACH_TL_WR741ND, /* TP-LINK TL-WR741ND */ - AR71XX_MACH_TL_WR741ND_V4, /* TP-LINK TL-WR741ND v4*/ - AR71XX_MACH_TL_WR841N_V1, /* TP-LINK TL-WR841N v1 */ - AR71XX_MACH_TL_WR841N_V7, /* TP-LINK TL-WR841N/ND v7 */ - AR71XX_MACH_TL_WR941ND, /* TP-LINK TL-WR941ND */ - AR71XX_MACH_UBNT_AIRROUTER, /* Ubiquiti AirRouter */ - AR71XX_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */ - AR71XX_MACH_UBNT_LSSR71, /* Ubiquiti LS-SR71 */ - AR71XX_MACH_UBNT_LSX, /* Ubiquiti LSX */ - AR71XX_MACH_UBNT_NANO_M, /* Ubiquiti NanoStation M */ - AR71XX_MACH_UBNT_ROCKET_M, /* Ubiquiti Rocket M */ - AR71XX_MACH_UBNT_RSPRO, /* Ubiquiti RouterStation Pro */ - AR71XX_MACH_UBNT_RS, /* Ubiquiti RouterStation */ - AR71XX_MACH_UBNT_UNIFI, /* Unifi */ - AR71XX_MACH_WHR_G301N, /* Buffalo WHR-G301N */ - AR71XX_MACH_WHR_HP_G300N, /* Buffalo WHR-HP-G300N */ - AR71XX_MACH_WHR_HP_GN, /* Buffalo WHR-HP-GN */ - AR71XX_MACH_WNDR3700, /* NETGEAR WNDR3700/WNDR3800/WNDRMAC */ - AR71XX_MACH_WNR2000, /* NETGEAR WNR2000 */ - AR71XX_MACH_WP543, /* Compex WP543 */ - AR71XX_MACH_WRT160NL, /* Linksys WRT160NL */ - AR71XX_MACH_WRT400N, /* Linksys WRT400N */ - AR71XX_MACH_WZR_HP_AG300H, /* Buffalo WZR-HP-AG300H */ - AR71XX_MACH_WZR_HP_G300NH, /* Buffalo WZR-HP-G300NH */ - AR71XX_MACH_WZR_HP_G300NH2, /* Buffalo WZR-HP-G300NH2 */ - AR71XX_MACH_WZR_HP_G450H, /* Buffalo WZR-HP-G450H */ - AR71XX_MACH_ZCN_1523H_2, /* Zcomax ZCN-1523H-2-xx */ - AR71XX_MACH_ZCN_1523H_5, /* Zcomax ZCN-1523H-5-xx */ -}; - -#endif /* _AR71XX_MACHTYPE_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/nvram.c b/target/linux/ar71xx/files/arch/mips/ar71xx/nvram.c deleted file mode 100644 index dfab24646..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/nvram.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Atheros AR71xx minimal nvram support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/vmalloc.h> -#include <linux/errno.h> -#include <linux/init.h> -#include <linux/string.h> - -#include "nvram.h" - -char *nvram_find_var(const char *name, const char *buf, unsigned buf_len) -{ - unsigned len = strlen(name); - char *cur, *last; - - if (buf_len == 0 || len == 0) - return NULL; - - if (buf_len < len) - return NULL; - - if (len == 1) - return memchr(buf, (int) *name, buf_len); - - last = (char *) buf + buf_len - len; - for (cur = (char *) buf; cur <= last; cur++) - if (cur[0] == name[0] && memcmp(cur, name, len) == 0) - return cur + len; - - return NULL; -} - -int nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, - const char *name, char *mac) -{ - char *buf; - char *mac_str; - int ret; - int t; - - buf = vmalloc(nvram_len); - if (!buf) - return -ENOMEM; - - memcpy(buf, nvram, nvram_len); - buf[nvram_len - 1] = '\0'; - - mac_str = nvram_find_var(name, buf, nvram_len); - if (!mac_str) { - ret = -EINVAL; - goto free; - } - - t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); - - if (t != 6) { - ret = -EINVAL; - goto free; - } - - ret = 0; - -free: - vfree(buf); - return ret; -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/nvram.h b/target/linux/ar71xx/files/arch/mips/ar71xx/nvram.h deleted file mode 100644 index b025d3fc9..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/nvram.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Atheros AR71xx minimal nvram support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR71XX_NVRAM_H -#define _AR71XX_NVRAM_H - -char *nvram_find_var(const char *name, const char *buf, - unsigned buf_len) __init; -int nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, - const char *name, char *mac) __init; - -#endif /* _AR71XX_NVRAM_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/pci-ath9k-fixup.c b/target/linux/ar71xx/files/arch/mips/ar71xx/pci-ath9k-fixup.c deleted file mode 100644 index 21f5a6816..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/pci-ath9k-fixup.c +++ /dev/null @@ -1,123 +0,0 @@ -/* - * Atheros AP94 reference board PCI initialization - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/delay.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -struct ath9k_fixup { - u16 *cal_data; - unsigned slot; -}; - -static int ath9k_num_fixups; -static struct ath9k_fixup ath9k_fixups[2]; - -static void ath9k_pci_fixup(struct pci_dev *dev) -{ - void __iomem *mem; - u16 *cal_data = NULL; - u16 cmd; - u32 bar0; - u32 val; - unsigned i; - - for (i = 0; i < ath9k_num_fixups; i++) { - if (ath9k_fixups[i].cal_data == NULL) - continue; - - if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn)) - continue; - - cal_data = ath9k_fixups[i].cal_data; - break; - } - - if (cal_data == NULL) - return; - - if (*cal_data != 0xa55a) { - pr_err("pci %s: invalid calibration data\n", pci_name(dev)); - return; - } - - pr_info("pci %s: fixup device configuration\n", pci_name(dev)); - - mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000); - if (!mem) { - pr_err("pci %s: ioremap error\n", pci_name(dev)); - return; - } - - pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7161: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, - AR71XX_PCI_MEM_BASE); - break; - case AR71XX_SOC_AR7240: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff); - break; - - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff); - break; - - default: - BUG(); - } - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - pci_write_config_word(dev, PCI_COMMAND, cmd); - - /* set pointer to first reg address */ - cal_data += 3; - while (*cal_data != 0xffff) { - u32 reg; - reg = *cal_data++; - val = *cal_data++; - val |= (*cal_data++) << 16; - - __raw_writel(val, mem + reg); - udelay(100); - } - - pci_read_config_dword(dev, PCI_VENDOR_ID, &val); - dev->vendor = val & 0xffff; - dev->device = (val >> 16) & 0xffff; - - pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); - dev->revision = val & 0xff; - dev->class = val >> 8; /* upper 3 bytes */ - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); - pci_write_config_word(dev, PCI_COMMAND, cmd); - - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); - - iounmap(mem); -} -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); - -void __init pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) -{ - if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) - return; - - ath9k_fixups[ath9k_num_fixups].slot = slot; - ath9k_fixups[ath9k_num_fixups].cal_data = cal_data; - ath9k_num_fixups++; -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/pci-ath9k-fixup.h b/target/linux/ar71xx/files/arch/mips/ar71xx/pci-ath9k-fixup.h deleted file mode 100644 index 5794941f0..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/pci-ath9k-fixup.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _PCI_ATH9K_FIXUP -#define _PCI_ATH9K_FIXUP - -void pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) __init; - -#endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c b/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c deleted file mode 100644 index f3c645241..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Atheros AR71xx PCI setup code - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> - -#include <asm/traps.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -unsigned ar71xx_pci_nr_irqs __initdata; -struct ar71xx_pci_irq *ar71xx_pci_irq_map __initdata; - -int (*ar71xx_pci_plat_dev_init)(struct pci_dev *dev); - -static int ar71xx_be_handler(struct pt_regs *regs, int is_fixup) -{ - int err = 0; - - err = ar71xx_pci_be_handler(is_fixup); - - return (is_fixup && !err) ? MIPS_BE_FIXUP : MIPS_BE_FATAL; -} - -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - if (ar71xx_pci_plat_dev_init) - return ar71xx_pci_plat_dev_init(dev); - - return 0; -} - -int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) -{ - int ret = 0; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - ret = ar71xx_pcibios_map_irq(dev, slot, pin); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - ret = ar724x_pcibios_map_irq(dev, slot, pin); - break; - - default: - break; - } - - return ret; -} - -int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) -{ - u32 t; - int ret = 0; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - board_be_handler = ar71xx_be_handler; - ret = ar71xx_pcibios_init(); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - ret = ar724x_pcibios_init(AR71XX_CPU_IRQ_IP2); - break; - - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - t = ar71xx_reset_rr(AR934X_RESET_REG_BOOTSTRAP); - if (t & AR934X_BOOTSTRAP_PCIE_RC) { - ret = ar724x_pcibios_init(AR934X_IP2_IRQ_PCIE); - break; - } - - /* fall through */ - default: - return 0; - } - - ar71xx_pci_nr_irqs = nr_irqs; - ar71xx_pci_irq_map = map; - - return ret; -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/prom.c b/target/linux/ar71xx/files/arch/mips/ar71xx/prom.c deleted file mode 100644 index b9b1e64fd..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/prom.c +++ /dev/null @@ -1,191 +0,0 @@ -/* - * Atheros AR71xx SoC specific prom routines - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/string.h> - -#include <asm/bootinfo.h> -#include <asm/addrspace.h> -#include <asm/fw/myloader/myloader.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -static inline int is_valid_ram_addr(void *addr) -{ - if (((u32) addr > KSEG0) && - ((u32) addr < (KSEG0 + AR71XX_MEM_SIZE_MAX))) - return 1; - - if (((u32) addr > KSEG1) && - ((u32) addr < (KSEG1 + AR71XX_MEM_SIZE_MAX))) - return 1; - - return 0; -} - -static char ar71xx_cmdline_buf[COMMAND_LINE_SIZE] __initdata; -static void __init ar71xx_prom_append_cmdline(const char *name, - const char *value) -{ - snprintf(ar71xx_cmdline_buf, sizeof(ar71xx_cmdline_buf), - " %s=%s", name, value); - strlcat(arcs_cmdline, ar71xx_cmdline_buf, sizeof(arcs_cmdline)); -} - -static const char * __init ar71xx_prom_find_env(char **envp, const char *name) -{ - const char *ret = NULL; - int len; - char **p; - - if (!is_valid_ram_addr(envp)) - return NULL; - - len = strlen(name); - for (p = envp; is_valid_ram_addr(*p); p++) { - if (strncmp(name, *p, len) == 0 && (*p)[len] == '=') { - ret = *p + len + 1; - break; - } - - /* RedBoot env comes in pointer pairs - key, value */ - if (strncmp(name, *p, len) == 0 && (*p)[len] == 0) - if (is_valid_ram_addr(*(++p))) { - ret = *p; - break; - } - } - - return ret; -} - -#ifdef CONFIG_IMAGE_CMDLINE_HACK -extern char __image_cmdline[]; - -static int __init ar71xx_use__image_cmdline(void) -{ - char *p = __image_cmdline; - int replace = 0; - - if (*p == '-') { - replace = 1; - p++; - } - - if (*p == '\0') - return 0; - - if (replace) { - strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline)); - } else { - strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); - strlcat(arcs_cmdline, p, sizeof(arcs_cmdline)); - } - - return 1; -} -#else -static inline int ar71xx_use__image_cmdline(void) { return 0; } -#endif - -static int __init ar71xx_prom_init_myloader(void) -{ - struct myloader_info *mylo; - char mac_buf[32]; - unsigned char *mac; - - mylo = myloader_get_info(); - if (!mylo) - return 0; - - switch (mylo->did) { - case DEVID_COMPEX_WP543: - ar71xx_prom_append_cmdline("board", "WP543"); - break; - default: - printk(KERN_WARNING "prom: unknown device id: %x\n", - mylo->did); - return 0; - } - - mac = mylo->macs[0]; - snprintf(mac_buf, sizeof(mac_buf), "%02x:%02x:%02x:%02x:%02x:%02x", - mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); - - ar71xx_prom_append_cmdline("ethaddr", mac_buf); - - ar71xx_use__image_cmdline(); - - return 1; -} - -static __init void ar71xx_prom_init_cmdline(int argc, char **argv) -{ - int i; - - if (ar71xx_use__image_cmdline()) - return; - - if (!is_valid_ram_addr(argv)) - return; - - for (i = 0; i < argc; i++) - if (is_valid_ram_addr(argv[i])) { - strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); - strlcat(arcs_cmdline, argv[i], sizeof(arcs_cmdline)); - } -} - -void __init prom_init(void) -{ - const char *env; - char **envp; - - printk(KERN_DEBUG "prom: fw_arg0=%08x, fw_arg1=%08x, " - "fw_arg2=%08x, fw_arg3=%08x\n", - (unsigned int)fw_arg0, (unsigned int)fw_arg1, - (unsigned int)fw_arg2, (unsigned int)fw_arg3); - - - if (ar71xx_prom_init_myloader()) - return; - - ar71xx_prom_init_cmdline(fw_arg0, (char **)fw_arg1); - - envp = (char **)fw_arg2; - if (!strstr(arcs_cmdline, "ethaddr=")) { - env = ar71xx_prom_find_env(envp, "ethaddr"); - if (env) - ar71xx_prom_append_cmdline("ethaddr", env); - } - - if (!strstr(arcs_cmdline, "board=")) { - env = ar71xx_prom_find_env(envp, "board"); - if (env) { - /* Workaround for buggy bootloaders */ - if (strcmp(env, "RouterStation") == 0 || - strcmp(env, "Ubiquiti AR71xx-based board") == 0) - env = "UBNT-RS"; - - if (strcmp(env, "RouterStation PRO") == 0) - env = "UBNT-RSPRO"; - - ar71xx_prom_append_cmdline("board", env); - } - } -} - -void __init prom_free_prom_memory(void) -{ - /* We do not have to prom memory to free */ -} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c deleted file mode 100644 index b1829a6da..000000000 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c +++ /dev/null @@ -1,482 +0,0 @@ -/* - * Atheros AR71xx SoC specific setup - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros 2.6.15 BSP - * Parts of this file are based on Atheros 2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/bootmem.h> - -#include <asm/bootinfo.h> -#include <asm/time.h> /* for mips_hpt_frequency */ -#include <asm/reboot.h> /* for _machine_{restart,halt} */ -#include <asm/mips_machine.h> - -#include <asm/mach-ar71xx/ar71xx.h> - -#include "machtype.h" -#include "devices.h" - -#define AR71XX_SYS_TYPE_LEN 64 - -u32 ar71xx_cpu_freq; -EXPORT_SYMBOL_GPL(ar71xx_cpu_freq); - -u32 ar71xx_ahb_freq; -EXPORT_SYMBOL_GPL(ar71xx_ahb_freq); - -u32 ar71xx_ddr_freq; -EXPORT_SYMBOL_GPL(ar71xx_ddr_freq); - -u32 ar71xx_ref_freq; -EXPORT_SYMBOL_GPL(ar71xx_ref_freq); - -enum ar71xx_soc_type ar71xx_soc; -EXPORT_SYMBOL_GPL(ar71xx_soc); - -u32 ar71xx_soc_rev; -EXPORT_SYMBOL_GPL(ar71xx_soc_rev); - -static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN]; - -static void ar71xx_restart(char *command) -{ - ar71xx_device_stop(RESET_MODULE_FULL_CHIP); - for (;;) - if (cpu_wait) - cpu_wait(); -} - -static void ar71xx_halt(void) -{ - while (1) - cpu_wait(); -} - -static void __init ar71xx_detect_mem_size(void) -{ - unsigned long size; - - for (size = AR71XX_MEM_SIZE_MIN; size < AR71XX_MEM_SIZE_MAX; - size <<= 1) { - if (!memcmp(ar71xx_detect_mem_size, - ar71xx_detect_mem_size + size, 1024)) - break; - } - - add_memory_region(0, size, BOOT_MEM_RAM); -} - -static void __init ar71xx_detect_sys_type(void) -{ - char *chip = "????"; - u32 id; - u32 major; - u32 minor; - u32 rev = 0; - - id = ar71xx_reset_rr(AR71XX_RESET_REG_REV_ID); - major = id & REV_ID_MAJOR_MASK; - - switch (major) { - case REV_ID_MAJOR_AR71XX: - minor = id & AR71XX_REV_ID_MINOR_MASK; - rev = id >> AR71XX_REV_ID_REVISION_SHIFT; - rev &= AR71XX_REV_ID_REVISION_MASK; - switch (minor) { - case AR71XX_REV_ID_MINOR_AR7130: - ar71xx_soc = AR71XX_SOC_AR7130; - chip = "7130"; - break; - - case AR71XX_REV_ID_MINOR_AR7141: - ar71xx_soc = AR71XX_SOC_AR7141; - chip = "7141"; - break; - - case AR71XX_REV_ID_MINOR_AR7161: - ar71xx_soc = AR71XX_SOC_AR7161; - chip = "7161"; - break; - } - break; - - case REV_ID_MAJOR_AR7240: - ar71xx_soc = AR71XX_SOC_AR7240; - chip = "7240"; - rev = id & AR724X_REV_ID_REVISION_MASK; - break; - - case REV_ID_MAJOR_AR7241: - ar71xx_soc = AR71XX_SOC_AR7241; - chip = "7241"; - rev = id & AR724X_REV_ID_REVISION_MASK; - break; - - case REV_ID_MAJOR_AR7242: - ar71xx_soc = AR71XX_SOC_AR7242; - chip = "7242"; - rev = id & AR724X_REV_ID_REVISION_MASK; - break; - - case REV_ID_MAJOR_AR913X: - minor = id & AR91XX_REV_ID_MINOR_MASK; - rev = id >> AR91XX_REV_ID_REVISION_SHIFT; - rev &= AR91XX_REV_ID_REVISION_MASK; - switch (minor) { - case AR91XX_REV_ID_MINOR_AR9130: - ar71xx_soc = AR71XX_SOC_AR9130; - chip = "9130"; - break; - - case AR91XX_REV_ID_MINOR_AR9132: - ar71xx_soc = AR71XX_SOC_AR9132; - chip = "9132"; - break; - } - break; - - case REV_ID_MAJOR_AR9330: - ar71xx_soc = AR71XX_SOC_AR9330; - chip = "9330"; - rev = id & AR933X_REV_ID_REVISION_MASK; - break; - - case REV_ID_MAJOR_AR9331: - ar71xx_soc = AR71XX_SOC_AR9331; - chip = "9331"; - rev = id & AR933X_REV_ID_REVISION_MASK; - break; - - case REV_ID_MAJOR_AR9341: - ar71xx_soc = AR71XX_SOC_AR9341; - chip = "9341"; - rev = id & AR934X_REV_ID_REVISION_MASK; - break; - - case REV_ID_MAJOR_AR9342: - ar71xx_soc = AR71XX_SOC_AR9342; - chip = "9342"; - rev = id & AR934X_REV_ID_REVISION_MASK; - break; - - case REV_ID_MAJOR_AR9344: - ar71xx_soc = AR71XX_SOC_AR9344; - chip = "9344"; - rev = id & AR934X_REV_ID_REVISION_MASK; - break; - - default: - panic("ar71xx: unknown chip id:0x%08x\n", id); - } - - ar71xx_soc_rev = rev; - - sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev); - pr_info("SoC: %s\n", ar71xx_sys_type); -} - -static void __init ar934x_detect_sys_frequency(void) -{ - u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; - u32 cpu_pll, ddr_pll; - u32 bootstrap; - - bootstrap = ar71xx_reset_rr(AR934X_RESET_REG_BOOTSTRAP); - if (bootstrap & AR934X_BOOTSTRAP_REF_CLK_40) - ar71xx_ref_freq = 40 * 1000 * 1000; - else - ar71xx_ref_freq = 25 * 1000 * 1000; - - pll = ar71xx_pll_rr(AR934X_PLL_REG_CPU_CONFIG); - out_div = AR934X_CPU_PLL_CFG_OUTDIV_GET(pll); - ref_div = AR934X_CPU_PLL_CFG_REFDIV_GET(pll); - nint = AR934X_CPU_PLL_CFG_NINT_GET(pll); - frac = AR934X_CPU_PLL_CFG_NFRAC_GET(pll); - - cpu_pll = nint * ar71xx_ref_freq / ref_div; - cpu_pll += frac * ar71xx_ref_freq / (ref_div * (2 << 6)); - cpu_pll /= (1 << out_div); - - pll = ar71xx_pll_rr(AR934X_PLL_REG_DDR_CONFIG); - out_div = AR934X_DDR_PLL_CFG_OUTDIV_GET(pll); - ref_div = AR934X_DDR_PLL_CFG_REFDIV_GET(pll); - nint = AR934X_DDR_PLL_CFG_NINT_GET(pll); - frac = AR934X_DDR_PLL_CFG_NFRAC_GET(pll); - - ddr_pll = nint * ar71xx_ref_freq / ref_div; - ddr_pll += frac * ar71xx_ref_freq / (ref_div * (2 << 10)); - ddr_pll /= (1 << out_div); - - clk_ctrl = ar71xx_pll_rr(AR934X_PLL_REG_DDR_CTRL_CLOCK); - - if (clk_ctrl & AR934X_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS) { - ar71xx_cpu_freq = ar71xx_ref_freq; - } else { - postdiv = AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_GET(clk_ctrl); - - if (clk_ctrl & AR934X_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL) - ar71xx_cpu_freq = cpu_pll / (postdiv + 1); - else - ar71xx_cpu_freq = ddr_pll / (postdiv + 1); - } - - if (clk_ctrl & AR934X_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS) { - ar71xx_ddr_freq = ar71xx_ref_freq; - } else { - postdiv = AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_GET(clk_ctrl); - - if (clk_ctrl & AR934X_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL) - ar71xx_ddr_freq = ddr_pll / (postdiv + 1); - else - ar71xx_ddr_freq = cpu_pll / (postdiv + 1); - } - - if (clk_ctrl & AR934X_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS) { - ar71xx_ahb_freq = ar71xx_ref_freq; - } else { - postdiv = AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_GET(clk_ctrl); - - if (clk_ctrl & AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL) - ar71xx_ahb_freq = ddr_pll / (postdiv + 1); - else - ar71xx_ahb_freq = cpu_pll / (postdiv + 1); - } -} - -static void __init ar91xx_detect_sys_frequency(void) -{ - u32 pll; - u32 freq; - u32 div; - - ar71xx_ref_freq = 5 * 1000 * 1000; - - pll = ar71xx_pll_rr(AR91XX_PLL_REG_CPU_CONFIG); - - div = ((pll >> AR91XX_PLL_DIV_SHIFT) & AR91XX_PLL_DIV_MASK); - freq = div * ar71xx_ref_freq; - - ar71xx_cpu_freq = freq; - - div = ((pll >> AR91XX_DDR_DIV_SHIFT) & AR91XX_DDR_DIV_MASK) + 1; - ar71xx_ddr_freq = freq / div; - - div = (((pll >> AR91XX_AHB_DIV_SHIFT) & AR91XX_AHB_DIV_MASK) + 1) * 2; - ar71xx_ahb_freq = ar71xx_cpu_freq / div; -} - -static void __init ar71xx_detect_sys_frequency(void) -{ - u32 pll; - u32 freq; - u32 div; - - ar71xx_ref_freq = 40 * 1000 * 1000; - - pll = ar71xx_pll_rr(AR71XX_PLL_REG_CPU_CONFIG); - - div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1; - freq = div * ar71xx_ref_freq; - - div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1; - ar71xx_cpu_freq = freq / div; - - div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1; - ar71xx_ddr_freq = freq / div; - - div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; - ar71xx_ahb_freq = ar71xx_cpu_freq / div; -} - -static void __init ar724x_detect_sys_frequency(void) -{ - u32 pll; - u32 freq; - u32 div; - - ar71xx_ref_freq = 5 * 1000 * 1000; - - pll = ar71xx_pll_rr(AR724X_PLL_REG_CPU_CONFIG); - - div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK); - freq = div * ar71xx_ref_freq; - - div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK); - freq *= div; - - ar71xx_cpu_freq = freq; - - div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1; - ar71xx_ddr_freq = freq / div; - - div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2; - ar71xx_ahb_freq = ar71xx_cpu_freq / div; -} - -static void __init ar933x_detect_sys_frequency(void) -{ - u32 clock_ctrl; - u32 cpu_config; - u32 freq; - u32 t; - - t = ar71xx_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - if (t & AR933X_BOOTSTRAP_REF_CLK_40) - ar71xx_ref_freq = (40 * 1000 * 1000); - else - ar71xx_ref_freq = (25 * 1000 * 1000); - - clock_ctrl = ar71xx_pll_rr(AR933X_PLL_CLOCK_CTRL_REG); - if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) { - ar71xx_cpu_freq = ar71xx_ref_freq; - ar71xx_ahb_freq = ar71xx_ref_freq; - ar71xx_ddr_freq = ar71xx_ref_freq; - } else { - cpu_config = ar71xx_pll_rr(AR933X_PLL_CPU_CONFIG_REG); - - t = (cpu_config >> AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT) & - AR933X_PLL_CPU_CONFIG_REFDIV_MASK; - freq = ar71xx_ref_freq / t; - - t = (cpu_config >> AR933X_PLL_CPU_CONFIG_NINT_SHIFT) & - AR933X_PLL_CPU_CONFIG_NINT_MASK; - freq *= t; - - t = (cpu_config >> AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - AR933X_PLL_CPU_CONFIG_OUTDIV_MASK; - if (t == 0) - t = 1; - - freq >>= t; - - t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT) & - AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK) + 1; - ar71xx_cpu_freq = freq / t; - - t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT) & - AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK) + 1; - ar71xx_ddr_freq = freq / t; - - t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT) & - AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1; - ar71xx_ahb_freq = freq / t; - } -} - -static void __init detect_sys_frequency(void) -{ - switch (ar71xx_soc) { - case AR71XX_SOC_AR7130: - case AR71XX_SOC_AR7141: - case AR71XX_SOC_AR7161: - ar71xx_detect_sys_frequency(); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - ar724x_detect_sys_frequency(); - break; - - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - ar91xx_detect_sys_frequency(); - break; - - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - ar933x_detect_sys_frequency(); - break; - - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - ar934x_detect_sys_frequency(); - break; - default: - BUG(); - } -} - -const char *get_system_type(void) -{ - return ar71xx_sys_type; -} - -unsigned int __cpuinit get_c0_compare_irq(void) -{ - return CP0_LEGACY_COMPARE_IRQ; -} - -void __init plat_mem_setup(void) -{ - set_io_port_base(KSEG1); - - ar71xx_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE, - AR71XX_DDR_CTRL_SIZE); - - ar71xx_pll_base = ioremap_nocache(AR71XX_PLL_BASE, - AR71XX_PLL_SIZE); - - ar71xx_reset_base = ioremap_nocache(AR71XX_RESET_BASE, - AR71XX_RESET_SIZE); - - ar71xx_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); - - ar71xx_usb_ctrl_base = ioremap_nocache(AR71XX_USB_CTRL_BASE, - AR71XX_USB_CTRL_SIZE); - - ar71xx_detect_mem_size(); - ar71xx_detect_sys_type(); - detect_sys_frequency(); - - pr_info("Clocks: CPU:%u.%03uMHz, DDR:%u.%03uMHz, AHB:%u.%03uMHz, " - "Ref:%u.%03uMHz", - ar71xx_cpu_freq / 1000000, (ar71xx_cpu_freq / 1000) % 1000, - ar71xx_ddr_freq / 1000000, (ar71xx_ddr_freq / 1000) % 1000, - ar71xx_ahb_freq / 1000000, (ar71xx_ahb_freq / 1000) % 1000, - ar71xx_ref_freq / 1000000, (ar71xx_ref_freq / 1000) % 1000); - - _machine_restart = ar71xx_restart; - _machine_halt = ar71xx_halt; - pm_power_off = ar71xx_halt; -} - -void __init plat_time_init(void) -{ - mips_hpt_frequency = ar71xx_cpu_freq / 2; -} - -__setup("board=", mips_machtype_setup); - -static int __init ar71xx_machine_setup(void) -{ - ar71xx_gpio_init(); - - ar71xx_add_device_uart(); - ar71xx_add_device_wdt(); - - mips_machine_setup(); - return 0; -} - -arch_initcall(ar71xx_machine_setup); - -static void __init ar71xx_generic_init(void) -{ - /* Nothing to do */ -} - -MIPS_MACHINE(AR71XX_MACH_GENERIC, "Generic", "Generic AR71xx board", - ar71xx_generic_init); diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h deleted file mode 100644 index c391fee4a..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ /dev/null @@ -1,933 +0,0 @@ -/* - * Atheros AR71xx SoC specific definitions - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros 2.6.15 BSP - * Parts of this file are based on Atheros 2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_AR71XX_H -#define __ASM_MACH_AR71XX_H - -#include <linux/types.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/bitops.h> - -#ifndef __ASSEMBLER__ - -#define AR71XX_PCI_MEM_BASE 0x10000000 -#define AR71XX_PCI_MEM_SIZE 0x08000000 -#define AR71XX_APB_BASE 0x18000000 -#define AR71XX_GE0_BASE 0x19000000 -#define AR71XX_GE0_SIZE 0x01000000 -#define AR71XX_GE1_BASE 0x1a000000 -#define AR71XX_GE1_SIZE 0x01000000 -#define AR71XX_EHCI_BASE 0x1b000000 -#define AR71XX_EHCI_SIZE 0x01000000 -#define AR71XX_OHCI_BASE 0x1c000000 -#define AR71XX_OHCI_SIZE 0x01000000 -#define AR7240_OHCI_BASE 0x1b000000 -#define AR7240_OHCI_SIZE 0x01000000 -#define AR71XX_SPI_BASE 0x1f000000 -#define AR71XX_SPI_SIZE 0x01000000 - -#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000) -#define AR71XX_DDR_CTRL_SIZE 0x10000 -#define AR71XX_CPU_BASE (AR71XX_APB_BASE + 0x00010000) -#define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000) -#define AR71XX_UART_SIZE 0x10000 -#define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000) -#define AR71XX_USB_CTRL_SIZE 0x10000 -#define AR71XX_GPIO_BASE (AR71XX_APB_BASE + 0x00040000) -#define AR71XX_GPIO_SIZE 0x10000 -#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000) -#define AR71XX_PLL_SIZE 0x10000 -#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) -#define AR71XX_RESET_SIZE 0x10000 -#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000) -#define AR71XX_MII_SIZE 0x10000 -#define AR71XX_SLIC_BASE (AR71XX_APB_BASE + 0x00090000) -#define AR71XX_SLIC_SIZE 0x10000 -#define AR71XX_DMA_BASE (AR71XX_APB_BASE + 0x000A0000) -#define AR71XX_DMA_SIZE 0x10000 -#define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000) -#define AR71XX_STEREO_SIZE 0x10000 - -#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000C0000) -#define AR724X_PCI_CRP_SIZE 0x100 - -#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000F0000) -#define AR724X_PCI_CTRL_SIZE 0x100 - -#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) -#define AR91XX_WMAC_SIZE 0x30000 - -#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) -#define AR933X_UART_SIZE 0x14 -#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -#define AR933X_GMAC_SIZE 0x04 -#define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -#define AR933X_WMAC_SIZE 0x20000 - -#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -#define AR934X_WMAC_SIZE 0x20000 -#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -#define AR934X_GMAC_SIZE 0x14 - -#define AR71XX_MEM_SIZE_MIN 0x0200000 -#define AR71XX_MEM_SIZE_MAX 0x10000000 - -#define AR71XX_CPU_IRQ_BASE 0 -#define AR71XX_MISC_IRQ_BASE 8 -#define AR71XX_MISC_IRQ_COUNT 32 -#define AR71XX_GPIO_IRQ_BASE 40 -#define AR71XX_GPIO_IRQ_COUNT 32 -#define AR71XX_PCI_IRQ_BASE 72 -#define AR71XX_PCI_IRQ_COUNT 6 -#define AR934X_IP2_IRQ_BASE 78 -#define AR934X_IP2_IRQ_COUNT 2 - -#define AR71XX_CPU_IRQ_IP2 (AR71XX_CPU_IRQ_BASE + 2) -#define AR71XX_CPU_IRQ_USB (AR71XX_CPU_IRQ_BASE + 3) -#define AR71XX_CPU_IRQ_GE0 (AR71XX_CPU_IRQ_BASE + 4) -#define AR71XX_CPU_IRQ_GE1 (AR71XX_CPU_IRQ_BASE + 5) -#define AR71XX_CPU_IRQ_MISC (AR71XX_CPU_IRQ_BASE + 6) -#define AR71XX_CPU_IRQ_TIMER (AR71XX_CPU_IRQ_BASE + 7) - -#define AR71XX_MISC_IRQ_TIMER (AR71XX_MISC_IRQ_BASE + 0) -#define AR71XX_MISC_IRQ_ERROR (AR71XX_MISC_IRQ_BASE + 1) -#define AR71XX_MISC_IRQ_GPIO (AR71XX_MISC_IRQ_BASE + 2) -#define AR71XX_MISC_IRQ_UART (AR71XX_MISC_IRQ_BASE + 3) -#define AR71XX_MISC_IRQ_WDOG (AR71XX_MISC_IRQ_BASE + 4) -#define AR71XX_MISC_IRQ_PERFC (AR71XX_MISC_IRQ_BASE + 5) -#define AR71XX_MISC_IRQ_OHCI (AR71XX_MISC_IRQ_BASE + 6) -#define AR71XX_MISC_IRQ_DMA (AR71XX_MISC_IRQ_BASE + 7) -#define AR71XX_MISC_IRQ_TIMER2 (AR71XX_MISC_IRQ_BASE + 8) -#define AR71XX_MISC_IRQ_TIMER3 (AR71XX_MISC_IRQ_BASE + 9) -#define AR71XX_MISC_IRQ_TIMER4 (AR71XX_MISC_IRQ_BASE + 10) -#define AR71XX_MISC_IRQ_DDR_PERF (AR71XX_MISC_IRQ_BASE + 11) -#define AR71XX_MISC_IRQ_ENET_LINK (AR71XX_MISC_IRQ_BASE + 12) - -#define AR71XX_GPIO_IRQ(_x) (AR71XX_GPIO_IRQ_BASE + (_x)) - -#define AR71XX_PCI_IRQ_DEV0 (AR71XX_PCI_IRQ_BASE + 0) -#define AR71XX_PCI_IRQ_DEV1 (AR71XX_PCI_IRQ_BASE + 1) -#define AR71XX_PCI_IRQ_DEV2 (AR71XX_PCI_IRQ_BASE + 2) -#define AR71XX_PCI_IRQ_CORE (AR71XX_PCI_IRQ_BASE + 4) - -#define AR934X_IP2_IRQ_WMAC (AR934X_IP2_IRQ_BASE + 0) -#define AR934X_IP2_IRQ_PCIE (AR934X_IP2_IRQ_BASE + 1) - -extern u32 ar71xx_ahb_freq; -extern u32 ar71xx_cpu_freq; -extern u32 ar71xx_ddr_freq; -extern u32 ar71xx_ref_freq; - -enum ar71xx_soc_type { - AR71XX_SOC_UNKNOWN, - AR71XX_SOC_AR7130, - AR71XX_SOC_AR7141, - AR71XX_SOC_AR7161, - AR71XX_SOC_AR7240, - AR71XX_SOC_AR7241, - AR71XX_SOC_AR7242, - AR71XX_SOC_AR9130, - AR71XX_SOC_AR9132, - AR71XX_SOC_AR9330, - AR71XX_SOC_AR9331, - AR71XX_SOC_AR9341, - AR71XX_SOC_AR9342, - AR71XX_SOC_AR9344, -}; -extern u32 ar71xx_soc_rev; - -extern enum ar71xx_soc_type ar71xx_soc; - -/* - * PLL block - */ -#define AR71XX_PLL_REG_CPU_CONFIG 0x00 -#define AR71XX_PLL_REG_SEC_CONFIG 0x04 -#define AR71XX_PLL_REG_ETH0_INT_CLOCK 0x10 -#define AR71XX_PLL_REG_ETH1_INT_CLOCK 0x14 - -#define AR71XX_PLL_DIV_SHIFT 3 -#define AR71XX_PLL_DIV_MASK 0x1f -#define AR71XX_CPU_DIV_SHIFT 16 -#define AR71XX_CPU_DIV_MASK 0x3 -#define AR71XX_DDR_DIV_SHIFT 18 -#define AR71XX_DDR_DIV_MASK 0x3 -#define AR71XX_AHB_DIV_SHIFT 20 -#define AR71XX_AHB_DIV_MASK 0x7 - -#define AR71XX_ETH0_PLL_SHIFT 17 -#define AR71XX_ETH1_PLL_SHIFT 19 - -#define AR724X_PLL_REG_CPU_CONFIG 0x00 -#define AR724X_PLL_REG_PCIE_CONFIG 0x18 - -#define AR724X_PLL_DIV_SHIFT 0 -#define AR724X_PLL_DIV_MASK 0x3ff -#define AR724X_PLL_REF_DIV_SHIFT 10 -#define AR724X_PLL_REF_DIV_MASK 0xf -#define AR724X_AHB_DIV_SHIFT 19 -#define AR724X_AHB_DIV_MASK 0x1 -#define AR724X_DDR_DIV_SHIFT 22 -#define AR724X_DDR_DIV_MASK 0x3 - -#define AR7242_PLL_REG_ETH0_INT_CLOCK 0x2c - -#define AR91XX_PLL_REG_CPU_CONFIG 0x00 -#define AR91XX_PLL_REG_ETH_CONFIG 0x04 -#define AR91XX_PLL_REG_ETH0_INT_CLOCK 0x14 -#define AR91XX_PLL_REG_ETH1_INT_CLOCK 0x18 - -#define AR91XX_PLL_DIV_SHIFT 0 -#define AR91XX_PLL_DIV_MASK 0x3ff -#define AR91XX_DDR_DIV_SHIFT 22 -#define AR91XX_DDR_DIV_MASK 0x3 -#define AR91XX_AHB_DIV_SHIFT 19 -#define AR91XX_AHB_DIV_MASK 0x1 - -#define AR91XX_ETH0_PLL_SHIFT 20 -#define AR91XX_ETH1_PLL_SHIFT 22 - -#define AR933X_PLL_CPU_CONFIG_REG 0x00 -#define AR933X_PLL_CLOCK_CTRL_REG 0x08 - -#define AR933X_PLL_CPU_CONFIG_NINT_SHIFT 10 -#define AR933X_PLL_CPU_CONFIG_NINT_MASK 0x3f -#define AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT 16 -#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT 23 -#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 - -#define AR933X_PLL_CLOCK_CTRL_BYPASS BIT(2) -#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT 5 -#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK 0x3 -#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT 10 -#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK 0x3 -#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT 15 -#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK 0x7 - -#define AR934X_PLL_REG_CPU_CONFIG 0x00 -#define AR934X_PLL_REG_DDR_CONFIG 0x04 -#define AR934X_PLL_REG_DDR_CTRL_CLOCK 0x8 - -#define AR934X_CPU_PLL_CFG_OUTDIV_MSB 21 -#define AR934X_CPU_PLL_CFG_OUTDIV_LSB 19 -#define AR934X_CPU_PLL_CFG_OUTDIV_MASK 0x00380000 - -#define AR934X_CPU_PLL_CFG_OUTDIV_GET(x) \ - (((x) & AR934X_CPU_PLL_CFG_OUTDIV_MASK) >> \ - AR934X_CPU_PLL_CFG_OUTDIV_LSB) - -#define AR934X_DDR_PLL_CFG_OUTDIV_MSB 25 -#define AR934X_DDR_PLL_CFG_OUTDIV_LSB 23 -#define AR934X_DDR_PLL_CFG_OUTDIV_MASK 0x03800000 - -#define AR934X_DDR_PLL_CFG_OUTDIV_GET(x) \ - (((x) & AR934X_DDR_PLL_CFG_OUTDIV_MASK) >> \ - AR934X_DDR_PLL_CFG_OUTDIV_LSB) - -#define AR934X_DDR_PLL_CFG_OUTDIV_SET(x) \ - (((x) << AR934X_DDR_PLL_CFG_OUTDIV_LSB) & \ - AR934X_DDR_PLL_CFG_OUTDIV_MASK) - -#define AR934X_CPU_PLL_CFG_REFDIV_MSB 16 -#define AR934X_CPU_PLL_CFG_REFDIV_LSB 12 -#define AR934X_CPU_PLL_CFG_REFDIV_MASK 0x0001f000 - -#define AR934X_CPU_PLL_CFG_REFDIV_GET(x) \ - (((x) & AR934X_CPU_PLL_CFG_REFDIV_MASK) >> \ - AR934X_CPU_PLL_CFG_REFDIV_LSB) - -#define AR934X_CPU_PLL_CFG_REFDIV_SET(x) \ - (((x) << AR934X_CPU_PLL_CFG_REFDIV_LSB) & \ - AR934X_CPU_PLL_CFG_REFDIV_MASK) - -#define AR934X_CPU_PLL_CFG_REFDIV_RESET 2 - -#define AR934X_CPU_PLL_CFG_NINT_MSB 11 -#define AR934X_CPU_PLL_CFG_NINT_LSB 6 -#define AR934X_CPU_PLL_CFG_NINT_MASK 0x00000fc0 - -#define AR934X_CPU_PLL_CFG_NINT_GET(x) \ - (((x) & AR934X_CPU_PLL_CFG_NINT_MASK) >> \ - AR934X_CPU_PLL_CFG_NINT_LSB) - -#define AR934X_CPU_PLL_CFG_NINT_SET(x) \ - (((x) << AR934X_CPU_PLL_CFG_NINT_LSB) & \ - AR934X_CPU_PLL_CFG_NINT_MASK) - -#define AR934X_CPU_PLL_CFG_NINT_RESET 20 - -#define AR934X_CPU_PLL_CFG_NFRAC_MSB 5 -#define AR934X_CPU_PLL_CFG_NFRAC_LSB 0 -#define AR934X_CPU_PLL_CFG_NFRAC_MASK 0x0000003f - -#define AR934X_CPU_PLL_CFG_NFRAC_GET(x) \ - (((x) & AR934X_CPU_PLL_CFG_NFRAC_MASK) >> \ - AR934X_CPU_PLL_CFG_NFRAC_LSB) - -#define AR934X_CPU_PLL_CFG_NFRAC_SET(x) \ - (((x) << AR934X_CPU_PLL_CFG_NFRAC_LSB) & \ - AR934X_CPU_PLL_CFG_NFRAC_MASK) - -#define AR934X_DDR_PLL_CFG_REFDIV_MSB 20 -#define AR934X_DDR_PLL_CFG_REFDIV_LSB 16 -#define AR934X_DDR_PLL_CFG_REFDIV_MASK 0x001f0000 - -#define AR934X_DDR_PLL_CFG_REFDIV_GET(x) \ - (((x) & AR934X_DDR_PLL_CFG_REFDIV_MASK) >> \ - AR934X_DDR_PLL_CFG_REFDIV_LSB) - -#define AR934X_DDR_PLL_CFG_REFDIV_SET(x) \ - (((x) << AR934X_DDR_PLL_CFG_REFDIV_LSB) & \ - AR934X_DDR_PLL_CFG_REFDIV_MASK) - -#define AR934X_DDR_PLL_CFG_REFDIV_RESET 2 - -#define AR934X_DDR_PLL_CFG_NINT_MSB 15 -#define AR934X_DDR_PLL_CFG_NINT_LSB 10 -#define AR934X_DDR_PLL_CFG_NINT_MASK 0x0000fc00 - -#define AR934X_DDR_PLL_CFG_NINT_GET(x) \ - (((x) & AR934X_DDR_PLL_CFG_NINT_MASK) >> \ - AR934X_DDR_PLL_CFG_NINT_LSB) - -#define AR934X_DDR_PLL_CFG_NINT_SET(x) \ - (((x) << AR934X_DDR_PLL_CFG_NINT_LSB) & \ - AR934X_DDR_PLL_CFG_NINT_MASK) - -#define AR934X_DDR_PLL_CFG_NINT_RESET 20 - -#define AR934X_DDR_PLL_CFG_NFRAC_MSB 9 -#define AR934X_DDR_PLL_CFG_NFRAC_LSB 0 -#define AR934X_DDR_PLL_CFG_NFRAC_MASK 0x000003ff - -#define AR934X_DDR_PLL_CFG_NFRAC_GET(x) \ - (((x) & AR934X_DDR_PLL_CFG_NFRAC_MASK) >> \ - AR934X_DDR_PLL_CFG_NFRAC_LSB) - -#define AR934X_DDR_PLL_CFG_NFRAC_SET(x) \ - (((x) << AR934X_DDR_PLL_CFG_NFRAC_LSB) & \ - AR934X_DDR_PLL_CFG_NFRAC_MASK) - -#define AR934X_DDR_PLL_CFG_NFRAC_RESET 512 - -#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MSB 19 -#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_LSB 15 -#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK 0x000f8000 - -#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_GET(x) \ - (((x) & AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK) >> \ - AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_LSB) - -#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SET(x) \ - (((x) << AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_LSB) & \ - AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK) - -#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_RESET 0 - -#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MSB 14 -#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_LSB 10 -#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK 0x00007c00 - -#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_GET(x) \ - (((x) & AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK) >> \ - AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_LSB) - -#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SET(x) \ - (((x) << AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_LSB) & \ - AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK) - -#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_RESET 0 - -#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MSB 9 -#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_LSB 5 -#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK 0x000003e0 - -#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_GET(x) \ - (((x) & AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK) >> \ - AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_LSB) - -#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SET(x) \ - (((x) << AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_LSB) & \ - AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK) - -#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_RESET 0 - -#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_MSB 24 -#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_LSB 24 -#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_MASK 0x01000000 - -#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_GET(x) \ - (((x) & AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_MASK) >> \ - AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_LSB) - -#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_SET(x) \ - (((x) << AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_LSB) & \ - AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_MASK) - -#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_RESET 1 - -#define AR934X_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -#define AR934X_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -#define AR934X_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -#define AR934X_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) -#define AR934X_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) -#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -extern void __iomem *ar71xx_pll_base; - -static inline void ar71xx_pll_wr(unsigned reg, u32 val) -{ - __raw_writel(val, ar71xx_pll_base + reg); -} - -static inline u32 ar71xx_pll_rr(unsigned reg) -{ - return __raw_readl(ar71xx_pll_base + reg); -} - -/* - * USB_CONFIG block - */ -#define USB_CTRL_REG_FLADJ 0x00 -#define USB_CTRL_REG_CONFIG 0x04 - -extern void __iomem *ar71xx_usb_ctrl_base; - -static inline void ar71xx_usb_ctrl_wr(unsigned reg, u32 val) -{ - __raw_writel(val, ar71xx_usb_ctrl_base + reg); -} - -static inline u32 ar71xx_usb_ctrl_rr(unsigned reg) -{ - return __raw_readl(ar71xx_usb_ctrl_base + reg); -} - -/* - * GPIO block - */ -#define AR71XX_GPIO_REG_OE 0x00 -#define AR71XX_GPIO_REG_IN 0x04 -#define AR71XX_GPIO_REG_OUT 0x08 -#define AR71XX_GPIO_REG_SET 0x0c -#define AR71XX_GPIO_REG_CLEAR 0x10 -#define AR71XX_GPIO_REG_INT_MODE 0x14 -#define AR71XX_GPIO_REG_INT_TYPE 0x18 -#define AR71XX_GPIO_REG_INT_POLARITY 0x1c -#define AR71XX_GPIO_REG_INT_PENDING 0x20 -#define AR71XX_GPIO_REG_INT_ENABLE 0x24 -#define AR71XX_GPIO_REG_FUNC 0x28 - -#define AR934X_GPIO_REG_OUT_FUNC0 0x2c -#define AR934X_GPIO_REG_OUT_FUNC1 0x30 -#define AR934X_GPIO_REG_OUT_FUNC2 0x34 -#define AR934X_GPIO_REG_OUT_FUNC3 0x38 -#define AR934X_GPIO_REG_OUT_FUNC4 0x3c -#define AR934X_GPIO_REG_OUT_FUNC5 0x40 -#define AR934X_GPIO_REG_FUNC 0x6c - -#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) -#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) -#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13) -#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12) -#define AR71XX_GPIO_FUNC_UART_EN BIT(8) -#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4) -#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0) - -#define AR71XX_GPIO_COUNT 16 - -#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19) -#define AR724X_GPIO_FUNC_SPI_EN BIT(18) -#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14) -#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13) -#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12) -#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11) -#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10) -#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9) -#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) -#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) -#define AR724X_GPIO_FUNC_UART_EN BIT(1) -#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0) - -#define AR7240_GPIO_COUNT 18 -#define AR7241_GPIO_COUNT 20 - -#define AR91XX_GPIO_FUNC_WMAC_LED_EN BIT(22) -#define AR91XX_GPIO_FUNC_EXP_PORT_CS_EN BIT(21) -#define AR91XX_GPIO_FUNC_I2S_REFCLKEN BIT(20) -#define AR91XX_GPIO_FUNC_I2S_MCKEN BIT(19) -#define AR91XX_GPIO_FUNC_I2S1_EN BIT(18) -#define AR91XX_GPIO_FUNC_I2S0_EN BIT(17) -#define AR91XX_GPIO_FUNC_SLIC_EN BIT(16) -#define AR91XX_GPIO_FUNC_UART_RTSCTS_EN BIT(9) -#define AR91XX_GPIO_FUNC_UART_EN BIT(8) -#define AR91XX_GPIO_FUNC_USB_CLK_EN BIT(4) - -#define AR91XX_GPIO_COUNT 22 - -#define AR933X_GPIO_FUNC_SPDIF2TCK BIT(31) -#define AR933X_GPIO_FUNC_SPDIF_EN BIT(30) -#define AR933X_GPIO_FUNC_I2SO_22_18_EN BIT(29) -#define AR933X_GPIO_FUNC_I2S_MCK_EN BIT(27) -#define AR933X_GPIO_FUNC_I2SO_EN BIT(26) -#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL BIT(25) -#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL BIT(24) -#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT BIT(23) -#define AR933X_GPIO_FUNC_SPI_EN BIT(18) -#define AR933X_GPIO_FUNC_SPI_CS_EN2 BIT(14) -#define AR933X_GPIO_FUNC_SPI_CS_EN1 BIT(13) -#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) -#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) -#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) -#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) -#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) -#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) -#define AR933X_GPIO_FUNC_UART_EN BIT(1) -#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0) - -#define AR933X_GPIO_COUNT 30 - -#define AR934X_GPIO_FUNC_SPI_CS_1_EN BIT(14) -#define AR934X_GPIO_FUNC_SPI_CS_0_EN BIT(13) - -#define AR934X_GPIO_COUNT 23 -#define AR934X_GPIO_FUNC_DDR_DQOE_EN BIT(17) - -#define AR934X_GPIO_OUT_GPIO 0x00 - -extern void __iomem *ar71xx_gpio_base; - -static inline void ar71xx_gpio_wr(unsigned reg, u32 value) -{ - __raw_writel(value, ar71xx_gpio_base + reg); -} - -static inline u32 ar71xx_gpio_rr(unsigned reg) -{ - return __raw_readl(ar71xx_gpio_base + reg); -} - -void ar71xx_gpio_init(void) __init; -void ar71xx_gpio_function_enable(u32 mask); -void ar71xx_gpio_function_disable(u32 mask); -void ar71xx_gpio_function_setup(u32 set, u32 clear); -void ar71xx_gpio_output_select(unsigned gpio, u8 val); - -/* - * DDR_CTRL block - */ -#define AR71XX_DDR_REG_PCI_WIN0 0x7c -#define AR71XX_DDR_REG_PCI_WIN1 0x80 -#define AR71XX_DDR_REG_PCI_WIN2 0x84 -#define AR71XX_DDR_REG_PCI_WIN3 0x88 -#define AR71XX_DDR_REG_PCI_WIN4 0x8c -#define AR71XX_DDR_REG_PCI_WIN5 0x90 -#define AR71XX_DDR_REG_PCI_WIN6 0x94 -#define AR71XX_DDR_REG_PCI_WIN7 0x98 -#define AR71XX_DDR_REG_FLUSH_GE0 0x9c -#define AR71XX_DDR_REG_FLUSH_GE1 0xa0 -#define AR71XX_DDR_REG_FLUSH_USB 0xa4 -#define AR71XX_DDR_REG_FLUSH_PCI 0xa8 - -#define AR724X_DDR_REG_FLUSH_GE0 0x7c -#define AR724X_DDR_REG_FLUSH_GE1 0x80 -#define AR724X_DDR_REG_FLUSH_USB 0x84 -#define AR724X_DDR_REG_FLUSH_PCIE 0x88 - -#define AR91XX_DDR_REG_FLUSH_GE0 0x7c -#define AR91XX_DDR_REG_FLUSH_GE1 0x80 -#define AR91XX_DDR_REG_FLUSH_USB 0x84 -#define AR91XX_DDR_REG_FLUSH_WMAC 0x88 - -#define AR933X_DDR_REG_FLUSH_GE0 0x7c -#define AR933X_DDR_REG_FLUSH_GE1 0x80 -#define AR933X_DDR_REG_FLUSH_USB 0x84 -#define AR933X_DDR_REG_FLUSH_WMAC 0x88 - -#define AR934X_DDR_REG_FLUSH_GE0 0x9c -#define AR934X_DDR_REG_FLUSH_GE1 0xa0 -#define AR934X_DDR_REG_FLUSH_USB 0xa4 -#define AR934X_DDR_REG_FLUSH_PCIE 0xa8 -#define AR934X_DDR_REG_FLUSH_WMAC 0xac - - -#define PCI_WIN0_OFFS 0x10000000 -#define PCI_WIN1_OFFS 0x11000000 -#define PCI_WIN2_OFFS 0x12000000 -#define PCI_WIN3_OFFS 0x13000000 -#define PCI_WIN4_OFFS 0x14000000 -#define PCI_WIN5_OFFS 0x15000000 -#define PCI_WIN6_OFFS 0x16000000 -#define PCI_WIN7_OFFS 0x07000000 - -extern void __iomem *ar71xx_ddr_base; - -static inline void ar71xx_ddr_wr(unsigned reg, u32 val) -{ - __raw_writel(val, ar71xx_ddr_base + reg); -} - -static inline u32 ar71xx_ddr_rr(unsigned reg) -{ - return __raw_readl(ar71xx_ddr_base + reg); -} - -void ar71xx_ddr_flush(u32 reg); - -/* - * PCI block - */ -#define AR71XX_PCI_CFG_BASE (AR71XX_PCI_MEM_BASE + PCI_WIN7_OFFS + 0x10000) -#define AR71XX_PCI_CFG_SIZE 0x100 - -#define PCI_REG_CRP_AD_CBE 0x00 -#define PCI_REG_CRP_WRDATA 0x04 -#define PCI_REG_CRP_RDDATA 0x08 -#define PCI_REG_CFG_AD 0x0c -#define PCI_REG_CFG_CBE 0x10 -#define PCI_REG_CFG_WRDATA 0x14 -#define PCI_REG_CFG_RDDATA 0x18 -#define PCI_REG_PCI_ERR 0x1c -#define PCI_REG_PCI_ERR_ADDR 0x20 -#define PCI_REG_AHB_ERR 0x24 -#define PCI_REG_AHB_ERR_ADDR 0x28 - -#define PCI_CRP_CMD_WRITE 0x00010000 -#define PCI_CRP_CMD_READ 0x00000000 -#define PCI_CFG_CMD_READ 0x0000000a -#define PCI_CFG_CMD_WRITE 0x0000000b - -#define PCI_IDSEL_ADL_START 17 - -#define AR724X_PCI_CFG_BASE (AR71XX_PCI_MEM_BASE + 0x4000000) -#define AR724X_PCI_CFG_SIZE 0x1000 - -#define AR724X_PCI_REG_APP 0x00 -#define AR724X_PCI_REG_RESET 0x18 -#define AR724X_PCI_REG_INT_STATUS 0x4c -#define AR724X_PCI_REG_INT_MASK 0x50 - -#define AR724X_PCI_APP_LTSSM_ENABLE BIT(0) -#define AR724X_PCI_RESET_LINK_UP BIT(0) - -#define AR724X_PCI_INT_DEV0 BIT(14) - -/* - * RESET block - */ -#define AR71XX_RESET_REG_TIMER 0x00 -#define AR71XX_RESET_REG_TIMER_RELOAD 0x04 -#define AR71XX_RESET_REG_WDOG_CTRL 0x08 -#define AR71XX_RESET_REG_WDOG 0x0c -#define AR71XX_RESET_REG_MISC_INT_STATUS 0x10 -#define AR71XX_RESET_REG_MISC_INT_ENABLE 0x14 -#define AR71XX_RESET_REG_PCI_INT_STATUS 0x18 -#define AR71XX_RESET_REG_PCI_INT_ENABLE 0x1c -#define AR71XX_RESET_REG_GLOBAL_INT_STATUS 0x20 -#define AR71XX_RESET_REG_RESET_MODULE 0x24 -#define AR71XX_RESET_REG_PERFC_CTRL 0x2c -#define AR71XX_RESET_REG_PERFC0 0x30 -#define AR71XX_RESET_REG_PERFC1 0x34 -#define AR71XX_RESET_REG_REV_ID 0x90 - -#define AR91XX_RESET_REG_GLOBAL_INT_STATUS 0x18 -#define AR91XX_RESET_REG_RESET_MODULE 0x1c -#define AR91XX_RESET_REG_PERF_CTRL 0x20 -#define AR91XX_RESET_REG_PERFC0 0x24 -#define AR91XX_RESET_REG_PERFC1 0x28 - -#define AR724X_RESET_REG_RESET_MODULE 0x1c - -#define AR933X_RESET_REG_RESET_MODULE 0x1c -#define AR933X_RESET_REG_BOOTSTRAP 0xac -#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) -#define AR933X_BOOTSTRAP_EEPBUSY BIT(4) -#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) - -#define AR934X_RESET_REG_RESET_MODULE 0x1c - -#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac -#define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) -#define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) -#define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) -#define AR934X_PCIE_WMAC_INT_WMAC_RXHP BIT(3) -#define AR934X_PCIE_WMAC_INT_PCIE_RC BIT(4) -#define AR934X_PCIE_WMAC_INT_PCIE_RC0 BIT(5) -#define AR934X_PCIE_WMAC_INT_PCIE_RC1 BIT(6) -#define AR934X_PCIE_WMAC_INT_PCIE_RC2 BIT(7) -#define AR934X_PCIE_WMAC_INT_PCIE_RC3 BIT(8) -#define AR934X_PCIE_WMAC_INT_WMAC_ALL \ - (AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \ - AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP) - -#define AR934X_PCIE_WMAC_INT_PCIE_ALL \ - (AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \ - AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ - AR934X_PCIE_WMAC_INT_PCIE_RC3) - -#define AR934X_RESET_REG_BOOTSTRAP 0xb0 -#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -#define AR934X_BOOTSTRAP_SW_OPTION7 BIT(22) -#define AR934X_BOOTSTRAP_SW_OPTION6 BIT(21) -#define AR934X_BOOTSTRAP_SW_OPTION5 BIT(20) -#define AR934X_BOOTSTRAP_SW_OPTION4 BIT(19) -#define AR934X_BOOTSTRAP_SW_OPTION3 BIT(18) -#define AR934X_BOOTSTRAP_SW_OPTION2 BIT(17) -#define AR934X_BOOTSTRAP_SW_OPTION1 BIT(16) -#define AR934X_BOOTSTRAP_USB_MODE_DEVICE BIT(7) -#define AR934X_BOOTSTRAP_PCIE_RC BIT(6) -#define AR934X_BOOTSTRAP_EJTAG_MODE BIT(5) -#define AR934X_BOOTSTRAP_REF_CLK_40 BIT(4) -#define AR934X_BOOTSTRAP_BOOT_FROM_SPI BIT(2) -#define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) -#define AR934X_BOOTSTRAP_DDR1 BIT(0) - -#define WDOG_CTRL_LAST_RESET BIT(31) -#define WDOG_CTRL_ACTION_MASK 3 -#define WDOG_CTRL_ACTION_NONE 0 /* no action */ -#define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */ -#define WDOG_CTRL_ACTION_NMI 2 /* NMI */ -#define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */ - -#define MISC_INT_ENET_LINK BIT(12) -#define MISC_INT_DDR_PERF BIT(11) -#define MISC_INT_TIMER4 BIT(10) -#define MISC_INT_TIMER3 BIT(9) -#define MISC_INT_TIMER2 BIT(8) -#define MISC_INT_DMA BIT(7) -#define MISC_INT_OHCI BIT(6) -#define MISC_INT_PERFC BIT(5) -#define MISC_INT_WDOG BIT(4) -#define MISC_INT_UART BIT(3) -#define MISC_INT_GPIO BIT(2) -#define MISC_INT_ERROR BIT(1) -#define MISC_INT_TIMER BIT(0) - -#define PCI_INT_CORE BIT(4) -#define PCI_INT_DEV2 BIT(2) -#define PCI_INT_DEV1 BIT(1) -#define PCI_INT_DEV0 BIT(0) - -#define RESET_MODULE_EXTERNAL BIT(28) -#define RESET_MODULE_FULL_CHIP BIT(24) -#define RESET_MODULE_AMBA2WMAC BIT(22) -#define RESET_MODULE_CPU_NMI BIT(21) -#define RESET_MODULE_CPU_COLD BIT(20) -#define RESET_MODULE_DMA BIT(19) -#define RESET_MODULE_SLIC BIT(18) -#define RESET_MODULE_STEREO BIT(17) -#define RESET_MODULE_DDR BIT(16) -#define RESET_MODULE_GE1_MAC BIT(13) -#define RESET_MODULE_GE1_PHY BIT(12) -#define RESET_MODULE_USBSUS_OVERRIDE BIT(10) -#define RESET_MODULE_GE0_MAC BIT(9) -#define RESET_MODULE_GE0_PHY BIT(8) -#define RESET_MODULE_USB_OHCI_DLL BIT(6) -#define RESET_MODULE_USB_HOST BIT(5) -#define RESET_MODULE_USB_PHY BIT(4) -#define RESET_MODULE_USB_OHCI_DLL_7240 BIT(3) -#define RESET_MODULE_PCI_BUS BIT(1) -#define RESET_MODULE_PCI_CORE BIT(0) - -#define AR724X_RESET_GE1_MDIO BIT(23) -#define AR724X_RESET_GE0_MDIO BIT(22) -#define AR724X_RESET_PCIE_PHY_SERIAL BIT(10) -#define AR724X_RESET_PCIE_PHY BIT(7) -#define AR724X_RESET_PCIE BIT(6) -#define AR724X_RESET_USB_HOST BIT(5) -#define AR724X_RESET_USB_PHY BIT(4) -#define AR724X_RESET_USBSUS_OVERRIDE BIT(3) - -#define AR933X_RESET_WMAC BIT(11) -#define AR933X_RESET_GE1_MDIO BIT(23) -#define AR933X_RESET_GE0_MDIO BIT(22) -#define AR933X_RESET_GE1_MAC BIT(13) -#define AR933X_RESET_GE0_MAC BIT(9) -#define AR933X_RESET_USB_HOST BIT(5) -#define AR933X_RESET_USB_PHY BIT(4) -#define AR933X_RESET_USBSUS_OVERRIDE BIT(3) - -#define AR934X_RESET_HOST BIT(31) -#define AR934X_RESET_SLIC BIT(30) -#define AR934X_RESET_HDMA BIT(29) -#define AR934X_RESET_EXTERNAL BIT(28) -#define AR934X_RESET_RTC BIT(27) -#define AR934X_RESET_PCIE_EP_INT BIT(26) -#define AR934X_RESET_CHKSUM_ACC BIT(25) -#define AR934X_RESET_FULL_CHIP BIT(24) -#define AR934X_RESET_GE1_MDIO BIT(23) -#define AR934X_RESET_GE0_MDIO BIT(22) -#define AR934X_RESET_CPU_NMI BIT(21) -#define AR934X_RESET_CPU_COLD BIT(20) -#define AR934X_RESET_HOST_RESET_INT BIT(19) -#define AR934X_RESET_PCIE_EP BIT(18) -#define AR934X_RESET_UART1 BIT(17) -#define AR934X_RESET_DDR BIT(16) -#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -#define AR934X_RESET_NANDF BIT(14) -#define AR934X_RESET_GE1_MAC BIT(13) -#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12) -#define AR934X_RESET_USB_PHY_ANALOG BIT(11) -#define AR934X_RESET_HOST_DMA_INT BIT(10) -#define AR934X_RESET_GE0_MAC BIT(9) -#define AR934X_RESET_ETH_SIWTCH BIT(8) -#define AR934X_RESET_PCIE_PHY BIT(7) -#define AR934X_RESET_PCIE BIT(6) -#define AR934X_RESET_USB_HOST BIT(5) -#define AR934X_RESET_USB_PHY BIT(4) -#define AR934X_RESET_USBSUS_OVERRIDE BIT(3) -#define AR934X_RESET_LUT BIT(2) -#define AR934X_RESET_MBOX BIT(1) -#define AR934X_RESET_I2S BIT(0) - -#define REV_ID_MAJOR_MASK 0xfff0 -#define REV_ID_MAJOR_AR71XX 0x00a0 -#define REV_ID_MAJOR_AR913X 0x00b0 -#define REV_ID_MAJOR_AR7240 0x00c0 -#define REV_ID_MAJOR_AR7241 0x0100 -#define REV_ID_MAJOR_AR7242 0x1100 -#define REV_ID_MAJOR_AR9330 0x0110 -#define REV_ID_MAJOR_AR9331 0x1110 -#define REV_ID_MAJOR_AR9341 0x0120 -#define REV_ID_MAJOR_AR9342 0x1120 -#define REV_ID_MAJOR_AR9344 0x2120 - -#define AR71XX_REV_ID_MINOR_MASK 0x3 -#define AR71XX_REV_ID_MINOR_AR7130 0x0 -#define AR71XX_REV_ID_MINOR_AR7141 0x1 -#define AR71XX_REV_ID_MINOR_AR7161 0x2 -#define AR71XX_REV_ID_REVISION_MASK 0x3 -#define AR71XX_REV_ID_REVISION_SHIFT 2 - -#define AR91XX_REV_ID_MINOR_MASK 0x3 -#define AR91XX_REV_ID_MINOR_AR9130 0x0 -#define AR91XX_REV_ID_MINOR_AR9132 0x1 -#define AR91XX_REV_ID_REVISION_MASK 0x3 -#define AR91XX_REV_ID_REVISION_SHIFT 2 - -#define AR724X_REV_ID_REVISION_MASK 0x3 - -#define AR933X_REV_ID_REVISION_MASK 0xf - -#define AR934X_REV_ID_REVISION_MASK 0xf - -extern void __iomem *ar71xx_reset_base; - -static inline void ar71xx_reset_wr(unsigned reg, u32 val) -{ - __raw_writel(val, ar71xx_reset_base + reg); -} - -static inline u32 ar71xx_reset_rr(unsigned reg) -{ - return __raw_readl(ar71xx_reset_base + reg); -} - -void ar71xx_device_stop(u32 mask); -void ar71xx_device_start(u32 mask); -void ar71xx_device_reset_rmw(u32 clear, u32 set); -int ar71xx_device_stopped(u32 mask); - -/* - * SPI block - */ -#define SPI_REG_FS 0x00 /* Function Select */ -#define SPI_REG_CTRL 0x04 /* SPI Control */ -#define SPI_REG_IOC 0x08 /* SPI I/O Control */ -#define SPI_REG_RDS 0x0c /* Read Data Shift */ - -#define SPI_FS_GPIO BIT(0) /* Enable GPIO mode */ - -#define SPI_CTRL_RD BIT(6) /* Remap Disable */ -#define SPI_CTRL_DIV_MASK 0x3f - -#define SPI_IOC_DO BIT(0) /* Data Out pin */ -#define SPI_IOC_CLK BIT(8) /* CLK pin */ -#define SPI_IOC_CS(n) BIT(16 + (n)) -#define SPI_IOC_CS0 SPI_IOC_CS(0) -#define SPI_IOC_CS1 SPI_IOC_CS(1) -#define SPI_IOC_CS2 SPI_IOC_CS(2) -#define SPI_IOC_CS_ALL (SPI_IOC_CS0 | SPI_IOC_CS1 | SPI_IOC_CS2) - -void ar71xx_flash_acquire(void); -void ar71xx_flash_release(void); - -/* - * MII_CTRL block - */ -#define MII_REG_MII0_CTRL 0x00 -#define MII_REG_MII1_CTRL 0x04 - -#define MII_CTRL_IF_MASK 3 -#define MII_CTRL_SPEED_SHIFT 4 -#define MII_CTRL_SPEED_MASK 3 -#define MII_CTRL_SPEED_10 0 -#define MII_CTRL_SPEED_100 1 -#define MII_CTRL_SPEED_1000 2 - -#define MII0_CTRL_IF_GMII 0 -#define MII0_CTRL_IF_MII 1 -#define MII0_CTRL_IF_RGMII 2 -#define MII0_CTRL_IF_RMII 3 - -#define MII1_CTRL_IF_RGMII 0 -#define MII1_CTRL_IF_RMII 1 - -/* - * AR933X GMAC - */ -#define AR933X_GMAC_REG_ETH_CFG 0x00 - -#define AR933X_ETH_CFG_RGMII_GE0 BIT(0) -#define AR933X_ETH_CFG_MII_GE0 BIT(1) -#define AR933X_ETH_CFG_GMII_GE0 BIT(2) -#define AR933X_ETH_CFG_MII_GE0_MASTER BIT(3) -#define AR933X_ETH_CFG_MII_GE0_SLAVE BIT(4) -#define AR933X_ETH_CFG_MII_GE0_ERR_EN BIT(5) -#define AR933X_ETH_CFG_SW_PHY_SWAP BIT(7) -#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(8) -#define AR933X_ETH_CFG_RMII_GE0 BIT(9) -#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0 -#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10) - -/* - * AR934X GMAC Interface - */ -#define AR934X_GMAC_REG_ETH_CFG 0x00 - -#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0) -#define AR934X_ETH_CFG_MII_GMAC0 BIT(1) -#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2) -#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3) -#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4) -#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5) -#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6) -#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7) -#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9) -#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10) -#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11) -#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12) -#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) - -#endif /* __ASSEMBLER__ */ - -#endif /* __ASM_MACH_AR71XX_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h deleted file mode 100644 index 05a93ecd9..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * AR91xx parallel flash driver platform data definitions - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __AR91XX_FLASH_H -#define __AR91XX_FLASH_H - -struct mtd_partition; - -struct ar91xx_flash_platform_data { - unsigned int width; - u8 is_shared:1; -#ifdef CONFIG_MTD_PARTITIONS - unsigned int nr_parts; - struct mtd_partition *parts; -#endif -}; - -#endif /* __AR91XX_FLASH_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar933x_uart.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar933x_uart.h deleted file mode 100644 index 527305559..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar933x_uart.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Atheros AR933X UART defines - * - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __AR933X_UART_H -#define __AR933X_UART_H - -#define AR933X_UART_REGS_SIZE 20 -#define AR933X_UART_FIFO_SIZE 16 - -#define AR933X_UART_DATA_REG 0x00 -#define AR933X_UART_CS_REG 0x04 -#define AR933X_UART_CLOCK_REG 0x08 -#define AR933X_UART_INT_REG 0x0c -#define AR933X_UART_INT_EN_REG 0x10 - -#define AR933X_UART_DATA_TX_RX_MASK 0xff -#define AR933X_UART_DATA_RX_CSR BIT(8) -#define AR933X_UART_DATA_TX_CSR BIT(9) - -#define AR933X_UART_CS_PARITY_S 0 -#define AR933X_UART_CS_PARITY_M 0x3 -#define AR933X_UART_CS_PARITY_NONE 0 -#define AR933X_UART_CS_PARITY_ODD 1 -#define AR933X_UART_CS_PARITY_EVEN 2 -#define AR933X_UART_CS_IF_MODE_S 2 -#define AR933X_UART_CS_IF_MODE_M 0x3 -#define AR933X_UART_CS_IF_MODE_NONE 0 -#define AR933X_UART_CS_IF_MODE_DTE 1 -#define AR933X_UART_CS_IF_MODE_DCE 2 -#define AR933X_UART_CS_FLOW_CTRL_S 4 -#define AR933X_UART_CS_FLOW_CTRL_M 0x3 -#define AR933X_UART_CS_DMA_EN BIT(6) -#define AR933X_UART_CS_TX_READY_ORIDE BIT(7) -#define AR933X_UART_CS_RX_READY_ORIDE BIT(8) -#define AR933X_UART_CS_TX_READY BIT(9) -#define AR933X_UART_CS_RX_BREAK BIT(10) -#define AR933X_UART_CS_TX_BREAK BIT(11) -#define AR933X_UART_CS_HOST_INT BIT(12) -#define AR933X_UART_CS_HOST_INT_EN BIT(13) -#define AR933X_UART_CS_TX_BUSY BIT(14) -#define AR933X_UART_CS_RX_BUSY BIT(15) - -#define AR933X_UART_CLOCK_STEP_M 0xffff -#define AR933X_UART_CLOCK_SCALE_M 0xfff -#define AR933X_UART_CLOCK_SCALE_S 16 -#define AR933X_UART_CLOCK_STEP_M 0xffff - -#define AR933X_UART_INT_RX_VALID BIT(0) -#define AR933X_UART_INT_TX_READY BIT(1) -#define AR933X_UART_INT_RX_FRAMING_ERR BIT(2) -#define AR933X_UART_INT_RX_OFLOW_ERR BIT(3) -#define AR933X_UART_INT_TX_OFLOW_ERR BIT(4) -#define AR933X_UART_INT_RX_PARITY_ERR BIT(5) -#define AR933X_UART_INT_RX_BREAK_ON BIT(6) -#define AR933X_UART_INT_RX_BREAK_OFF BIT(7) -#define AR933X_UART_INT_RX_FULL BIT(8) -#define AR933X_UART_INT_TX_EMPTY BIT(9) -#define AR933X_UART_INT_ALLINTS 0x3ff - -#endif /* __AR933X_UART_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar933x_uart_platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar933x_uart_platform.h deleted file mode 100644 index 6cb30f2b7..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar933x_uart_platform.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Platform data definition for Atheros AR933X UART - * - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR933X_UART_PLATFORM_H -#define _AR933X_UART_PLATFORM_H - -struct ar933x_uart_platform_data { - unsigned uartclk; -}; - -#endif /* _AR933X_UART_PLATFORM_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/cpu-feature-overrides.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/cpu-feature-overrides.h deleted file mode 100644 index d3560e59b..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/cpu-feature-overrides.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Atheros AR71xx specific CPU feature overrides - * - * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This file was derived from: include/asm-mips/cpu-features.h - * Copyright (C) 2003, 2004 Ralf Baechle - * Copyright (C) 2004 Maciej W. Rozycki - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - * - */ -#ifndef __ASM_MACH_AR71XX_CPU_FEATURE_OVERRIDES_H -#define __ASM_MACH_AR71XX_CPU_FEATURE_OVERRIDES_H - -#define cpu_has_tlb 1 -#define cpu_has_4kex 1 -#define cpu_has_3k_cache 0 -#define cpu_has_4k_cache 1 -#define cpu_has_tx39_cache 0 -#define cpu_has_sb1_cache 0 -#define cpu_has_fpu 0 -#define cpu_has_32fpr 0 -#define cpu_has_counter 1 -#define cpu_has_watch 1 -#define cpu_has_divec 1 - -#define cpu_has_prefetch 1 -#define cpu_has_ejtag 1 -#define cpu_has_llsc 1 - -#define cpu_has_mips16 1 -#define cpu_has_mdmx 0 -#define cpu_has_mips3d 0 -#define cpu_has_smartmips 0 - -#define cpu_has_mips32r1 1 -#define cpu_has_mips32r2 1 -#define cpu_has_mips64r1 0 -#define cpu_has_mips64r2 0 - -#define cpu_has_dsp 0 -#define cpu_has_mipsmt 0 - -#define cpu_has_64bits 0 -#define cpu_has_64bit_zero_reg 0 -#define cpu_has_64bit_gp_regs 0 -#define cpu_has_64bit_addresses 0 - -#define cpu_dcache_line_size() 32 -#define cpu_icache_line_size() 32 - -#endif /* __ASM_MACH_AR71XX_CPU_FEATURE_OVERRIDES_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/gpio.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/gpio.h deleted file mode 100644 index 56fe902e2..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/gpio.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Atheros AR71xx GPIO API definitions - * - * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - * - */ - -#ifndef __ASM_MACH_AR71XX_GPIO_H -#define __ASM_MACH_AR71XX_GPIO_H - -#define ARCH_NR_GPIOS 64 -#include <asm-generic/gpio.h> - -extern unsigned long ar71xx_gpio_count; -extern void __ar71xx_gpio_set_value(unsigned gpio, int value); -extern int __ar71xx_gpio_get_value(unsigned gpio); -int gpio_to_irq(unsigned gpio); -int irq_to_gpio(unsigned gpio); - -static inline int gpio_get_value(unsigned gpio) -{ - if (gpio < ar71xx_gpio_count) - return __ar71xx_gpio_get_value(gpio); - - return __gpio_get_value(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - if (gpio < ar71xx_gpio_count) - __ar71xx_gpio_set_value(gpio, value); - else - __gpio_set_value(gpio, value); -} - -#define gpio_cansleep __gpio_cansleep - -#endif /* __ASM_MACH_AR71XX_GPIO_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/irq.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/irq.h deleted file mode 100644 index c61d9c73f..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/irq.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ -#ifndef __ASM_MACH_AR71XX_IRQ_H -#define __ASM_MACH_AR71XX_IRQ_H - -#define MIPS_CPU_IRQ_BASE 0 -#define NR_IRQS 80 - -#include_next <irq.h> - -#endif /* __ASM_MACH_AR71XX_IRQ_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.h deleted file mode 100644 index 948d28034..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Atheros AR71xx specific kernel entry setup - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - * - */ -#ifndef __ASM_MACH_AR71XX_KERNEL_ENTRY_H -#define __ASM_MACH_AR71XX_KERNEL_ENTRY_H - - /* - * Some bootloaders set the 'Kseg0 coherency algorithm' to - * 'Cacheable, noncoherent, write-through, no write allocate' - * and this cause performance issues. Let's go and change it to - * 'Cacheable, noncoherent, write-back, write allocate' - */ - .macro kernel_entry_setup - mfc0 t0, CP0_CONFIG - li t1, ~CONF_CM_CMASK - and t0, t1 - ori t0, CONF_CM_CACHABLE_NONCOHERENT - mtc0 t0, CP0_CONFIG - nop - .endm - - .macro smp_slave_setup - .endm - -#endif /* __ASM_MACH_AR71XX_KERNEL_ENTRY_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mach-rb750.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mach-rb750.h deleted file mode 100644 index 661ba4ec7..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mach-rb750.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * MikroTik RouterBOARD 750 definitions - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ -#ifndef _MACH_RB750_H -#define _MACH_RB750_H - -#include <linux/bitops.h> - -#define RB750_GPIO_LVC573_LE 0 /* Latch enable on LVC573 */ -#define RB750_GPIO_NAND_IO0 1 /* NAND I/O 0 */ -#define RB750_GPIO_NAND_IO1 2 /* NAND I/O 1 */ -#define RB750_GPIO_NAND_IO2 3 /* NAND I/O 2 */ -#define RB750_GPIO_NAND_IO3 4 /* NAND I/O 3 */ -#define RB750_GPIO_NAND_IO4 5 /* NAND I/O 4 */ -#define RB750_GPIO_NAND_IO5 6 /* NAND I/O 5 */ -#define RB750_GPIO_NAND_IO6 7 /* NAND I/O 6 */ -#define RB750_GPIO_NAND_IO7 8 /* NAND I/O 7 */ -#define RB750_GPIO_NAND_NCE 11 /* NAND Chip Enable (active low) */ -#define RB750_GPIO_NAND_RDY 12 /* NAND Ready */ -#define RB750_GPIO_NAND_CLE 14 /* NAND Command Latch Enable */ -#define RB750_GPIO_NAND_ALE 15 /* NAND Address Latch Enable */ -#define RB750_GPIO_NAND_NRE 16 /* NAND Read Enable (active low) */ -#define RB750_GPIO_NAND_NWE 17 /* NAND Write Enable (active low) */ - -#define RB750_GPIO_BTN_RESET 1 -#define RB750_GPIO_SPI_CS0 2 -#define RB750_GPIO_LED_ACT 12 -#define RB750_GPIO_LED_PORT1 13 -#define RB750_GPIO_LED_PORT2 14 -#define RB750_GPIO_LED_PORT3 15 -#define RB750_GPIO_LED_PORT4 16 -#define RB750_GPIO_LED_PORT5 17 - -#define RB750_LED_ACT BIT(RB750_GPIO_LED_ACT) -#define RB750_LED_PORT1 BIT(RB750_GPIO_LED_PORT1) -#define RB750_LED_PORT2 BIT(RB750_GPIO_LED_PORT2) -#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3) -#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4) -#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5) - -#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE) - -#define RB750_LED_BITS (RB750_LED_PORT1 | RB750_LED_PORT2 | RB750_LED_PORT3 | \ - RB750_LED_PORT4 | RB750_LED_PORT5 | RB750_LED_ACT) - -struct rb750_led_data { - char *name; - char *default_trigger; - u32 mask; - int active_low; -}; - -struct rb750_led_platform_data { - int num_leds; - struct rb750_led_data *leds; -}; - -int rb750_latch_change(u32 mask_clr, u32 mask_set); - -#endif /* _MACH_RB750_H */
\ No newline at end of file diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mangle-port.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mangle-port.h deleted file mode 100644 index ba41b38b9..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mangle-port.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h - * Copyright (C) 2003, 2004 Ralf Baechle - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_AR71XX_MANGLE_PORT_H -#define __ASM_MACH_AR71XX_MANGLE_PORT_H - -#define __swizzle_addr_b(port) ((port) ^ 3) -#define __swizzle_addr_w(port) ((port) ^ 2) -#define __swizzle_addr_l(port) (port) -#define __swizzle_addr_q(port) (port) - -#if defined(CONFIG_SWAP_IO_SPACE) - -# define ioswabb(a, x) (x) -# define __mem_ioswabb(a, x) (x) -# define ioswabw(a, x) le16_to_cpu(x) -# define __mem_ioswabw(a, x) (x) -# define ioswabl(a, x) le32_to_cpu(x) -# define __mem_ioswabl(a, x) (x) -# define ioswabq(a, x) le64_to_cpu(x) -# define __mem_ioswabq(a, x) (x) - -#else - -# define ioswabb(a, x) (x) -# define __mem_ioswabb(a, x) (x) -# define ioswabw(a, x) (x) -# define __mem_ioswabw(a, x) cpu_to_le16(x) -# define ioswabl(a, x) (x) -# define __mem_ioswabl(a, x) cpu_to_le32(x) -# define ioswabq(a, x) (x) -# define __mem_ioswabq(a, x) cpu_to_le64(x) - -#endif - -#endif /* __ASM_MACH_AR71XX_MANGLE_PORT_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/pci.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/pci.h deleted file mode 100644 index 27043491a..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/pci.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Atheros AR71xx SoC specific PCI definitions - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_AR71XX_PCI_H -#define __ASM_MACH_AR71XX_PCI_H - -struct pci_dev; - -struct ar71xx_pci_irq { - int irq; - u8 slot; - u8 pin; -}; - -#ifdef CONFIG_PCI -extern int (*ar71xx_pci_plat_dev_init)(struct pci_dev *dev); -extern unsigned ar71xx_pci_nr_irqs __initdata; -extern struct ar71xx_pci_irq *ar71xx_pci_irq_map __initdata; - -int ar71xx_pcibios_map_irq(const struct pci_dev *dev, - uint8_t slot, uint8_t pin) __init; -int ar71xx_pcibios_init(void) __init; - -int ar71xx_pci_be_handler(int is_fixup); - -int ar724x_pcibios_map_irq(const struct pci_dev *dev, - uint8_t slot, uint8_t pin) __init; -int ar724x_pcibios_init(int irq) __init; - -int ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) __init; -#else -static inline int ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) -{ - return 0; -} -#endif - -#endif /* __ASM_MACH_AR71XX_PCI_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h deleted file mode 100644 index 206c4d750..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Atheros AR71xx SoC specific platform data definitions - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_AR71XX_PLATFORM_H -#define __ASM_MACH_AR71XX_PLATFORM_H - -#include <linux/if_ether.h> -#include <linux/skbuff.h> -#include <linux/phy.h> -#include <linux/spi/spi.h> - -struct ag71xx_switch_platform_data { - u8 phy4_mii_en:1; -}; - -struct ag71xx_platform_data { - phy_interface_t phy_if_mode; - u32 phy_mask; - int speed; - int duplex; - u32 reset_bit; - u8 mac_addr[ETH_ALEN]; - struct device *mii_bus_dev; - - u8 has_gbit:1; - u8 is_ar91xx:1; - u8 is_ar7240:1; - u8 is_ar724x:1; - u8 has_ar8216:1; - - struct ag71xx_switch_platform_data *switch_data; - - void (*ddr_flush)(void); - void (*set_speed)(int speed); - - u32 fifo_cfg1; - u32 fifo_cfg2; - u32 fifo_cfg3; -}; - -struct ag71xx_mdio_platform_data { - u32 phy_mask; - int is_ar7240; -}; - -struct ar71xx_ehci_platform_data { - u8 is_ar91xx; -}; - -struct ar71xx_spi_platform_data { - unsigned bus_num; - unsigned num_chipselect; - u32 (*get_ioc_base)(u8 chip_select, int cs_high, int is_on); -}; - -#define AR71XX_SPI_CS_INACTIVE 0 -#define AR71XX_SPI_CS_ACTIVE 1 - -#endif /* __ASM_MACH_AR71XX_PLATFORM_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/rb4xx_cpld.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/rb4xx_cpld.h deleted file mode 100644 index 5b17e94b6..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/rb4xx_cpld.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * SPI driver definitions for the CPLD chip on the Mikrotik RB4xx boards - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This file was based on the patches for Linux 2.6.27.39 published by - * MikroTik for their RouterBoard 4xx series devices. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define CPLD_GPIO_nLED1 0 -#define CPLD_GPIO_nLED2 1 -#define CPLD_GPIO_nLED3 2 -#define CPLD_GPIO_nLED4 3 -#define CPLD_GPIO_FAN 4 -#define CPLD_GPIO_ALE 5 -#define CPLD_GPIO_CLE 6 -#define CPLD_GPIO_nCE 7 -#define CPLD_GPIO_nLED5 8 - -#define CPLD_NUM_GPIOS 9 - -#define CPLD_CFG_nLED1 BIT(CPLD_GPIO_nLED1) -#define CPLD_CFG_nLED2 BIT(CPLD_GPIO_nLED2) -#define CPLD_CFG_nLED3 BIT(CPLD_GPIO_nLED3) -#define CPLD_CFG_nLED4 BIT(CPLD_GPIO_nLED4) -#define CPLD_CFG_FAN BIT(CPLD_GPIO_FAN) -#define CPLD_CFG_ALE BIT(CPLD_GPIO_ALE) -#define CPLD_CFG_CLE BIT(CPLD_GPIO_CLE) -#define CPLD_CFG_nCE BIT(CPLD_GPIO_nCE) -#define CPLD_CFG_nLED5 BIT(CPLD_GPIO_nLED5) - -struct rb4xx_cpld_platform_data { - unsigned gpio_base; -}; - -extern int rb4xx_cpld_change_cfg(unsigned mask, unsigned value); -extern int rb4xx_cpld_read(unsigned char *rx_buf, - const unsigned char *verify_buf, - unsigned cnt); -extern int rb4xx_cpld_read_from(unsigned addr, - unsigned char *rx_buf, - const unsigned char *verify_buf, - unsigned cnt); -extern int rb4xx_cpld_write(const unsigned char *buf, unsigned count); diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/war.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/war.h deleted file mode 100644 index 1ca6ffdc6..000000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/war.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> - */ -#ifndef __ASM_MACH_AR71XX_WAR_H -#define __ASM_MACH_AR71XX_WAR_H - -#define R4600_V1_INDEX_ICACHEOP_WAR 0 -#define R4600_V1_HIT_CACHEOP_WAR 0 -#define R4600_V2_HIT_CACHEOP_WAR 0 -#define R5432_CP0_INTERRUPT_WAR 0 -#define BCM1250_M3_WAR 0 -#define SIBYTE_1956_WAR 0 -#define MIPS4K_ICACHE_REFILL_WAR 0 -#define MIPS_CACHE_SYNC_WAR 0 -#define TX49XX_ICACHE_INDEX_INV_WAR 0 -#define RM9000_CDEX_SMP_WAR 0 -#define ICACHE_REFILLS_WORKAROUND_WAR 0 -#define R10000_LLSC_WAR 0 -#define MIPS34K_MISSED_ITLB_WAR 0 - -#endif /* __ASM_MACH_AR71XX_WAR_H */ diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c deleted file mode 100644 index fd6b37900..000000000 --- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c +++ /dev/null @@ -1,415 +0,0 @@ -/* - * Atheros AR71xx PCI host controller driver - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/resource.h> -#include <linux/types.h> -#include <linux/delay.h> -#include <linux/bitops.h> -#include <linux/pci.h> -#include <linux/pci_regs.h> -#include <linux/interrupt.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -#undef DEBUG -#ifdef DEBUG -#define DBG(fmt, args...) printk(KERN_DEBUG fmt, ## args) -#else -#define DBG(fmt, args...) -#endif - -#define AR71XX_PCI_DELAY 100 /* msecs */ - -#if 0 -#define PCI_IDSEL_BASE PCI_IDSEL_ADL_START -#else -#define PCI_IDSEL_BASE 0 -#endif - -static void __iomem *ar71xx_pcicfg_base; -static DEFINE_SPINLOCK(ar71xx_pci_lock); -static int ar71xx_pci_fixup_enable; - -static inline void ar71xx_pci_delay(void) -{ - mdelay(AR71XX_PCI_DELAY); -} - -/* Byte lane enable bits */ -static u8 ble_table[4][4] = { - {0x0, 0xf, 0xf, 0xf}, - {0xe, 0xd, 0xb, 0x7}, - {0xc, 0xf, 0x3, 0xf}, - {0xf, 0xf, 0xf, 0xf}, -}; - -static inline u32 ar71xx_pci_get_ble(int where, int size, int local) -{ - u32 t; - - t = ble_table[size & 3][where & 3]; - BUG_ON(t == 0xf); - t <<= (local) ? 20 : 4; - return t; -} - -static inline u32 ar71xx_pci_bus_addr(struct pci_bus *bus, unsigned int devfn, - int where) -{ - u32 ret; - - if (!bus->number) { - /* type 0 */ - ret = (1 << (PCI_IDSEL_BASE + PCI_SLOT(devfn))) - | (PCI_FUNC(devfn) << 8) | (where & ~3); - } else { - /* type 1 */ - ret = (bus->number << 16) | (PCI_SLOT(devfn) << 11) - | (PCI_FUNC(devfn) << 8) | (where & ~3) | 1; - } - - return ret; -} - -int ar71xx_pci_be_handler(int is_fixup) -{ - void __iomem *base = ar71xx_pcicfg_base; - u32 pci_err; - u32 ahb_err; - - pci_err = __raw_readl(base + PCI_REG_PCI_ERR) & 3; - if (pci_err) { - if (!is_fixup) - printk(KERN_ALERT "PCI error %d at PCI addr 0x%x\n", - pci_err, - __raw_readl(base + PCI_REG_PCI_ERR_ADDR)); - - __raw_writel(pci_err, base + PCI_REG_PCI_ERR); - } - - ahb_err = __raw_readl(base + PCI_REG_AHB_ERR) & 1; - if (ahb_err) { - if (!is_fixup) - printk(KERN_ALERT "AHB error at AHB address 0x%x\n", - __raw_readl(base + PCI_REG_AHB_ERR_ADDR)); - - __raw_writel(ahb_err, base + PCI_REG_AHB_ERR); - } - - return (ahb_err | pci_err) ? 1 : 0; -} - -static inline int ar71xx_pci_set_cfgaddr(struct pci_bus *bus, - unsigned int devfn, int where, int size, u32 cmd) -{ - void __iomem *base = ar71xx_pcicfg_base; - u32 addr; - - addr = ar71xx_pci_bus_addr(bus, devfn, where); - - DBG("PCI: set cfgaddr: %02x:%02x.%01x/%02x:%01d, addr=%08x\n", - bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), - where, size, addr); - - __raw_writel(addr, base + PCI_REG_CFG_AD); - __raw_writel(cmd | ar71xx_pci_get_ble(where, size, 0), - base + PCI_REG_CFG_CBE); - - return ar71xx_pci_be_handler(1); -} - -static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *value) -{ - void __iomem *base = ar71xx_pcicfg_base; - static u32 mask[8] = {0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0}; - unsigned long flags; - u32 data; - int retry = 0; - int ret; - - ret = PCIBIOS_SUCCESSFUL; - - DBG("PCI: read config: %02x:%02x.%01x/%02x:%01d\n", bus->number, - PCI_SLOT(devfn), PCI_FUNC(devfn), where, size); - -retry: - spin_lock_irqsave(&ar71xx_pci_lock, flags); - - if (bus->number == 0 && devfn == 0) { - u32 t; - - t = PCI_CRP_CMD_READ | (where & ~3); - - __raw_writel(t, base + PCI_REG_CRP_AD_CBE); - data = __raw_readl(base + PCI_REG_CRP_RDDATA); - - DBG("PCI: rd local cfg, ad_cbe:%08x, data:%08x\n", t, data); - - } else { - int err; - - err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, - PCI_CFG_CMD_READ); - - if (err == 0) { - data = __raw_readl(base + PCI_REG_CFG_RDDATA); - } else { - ret = PCIBIOS_DEVICE_NOT_FOUND; - data = ~0; - } - } - - spin_unlock_irqrestore(&ar71xx_pci_lock, flags); - - DBG("PCI: read config: data=%08x raw=%08x\n", - (data >> (8 * (where & 3))) & mask[size & 7], data); - - *value = (data >> (8 * (where & 3))) & mask[size & 7]; - - /* - * PCI controller bug: sometimes reads to the PCI_COMMAND register - * return 0xffff, even though the PCI trace shows the correct value. - * Work around this by retrying reads to this register - */ - if (where == PCI_COMMAND && (*value & 0xffff) == 0xffff && retry++ < 2) - goto retry; - - return ret; -} - -static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 value) -{ - void __iomem *base = ar71xx_pcicfg_base; - unsigned long flags; - int ret; - - DBG("PCI: write config: %02x:%02x.%01x/%02x:%01d value=%08x\n", - bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), - where, size, value); - - value = value << (8 * (where & 3)); - ret = PCIBIOS_SUCCESSFUL; - - spin_lock_irqsave(&ar71xx_pci_lock, flags); - if (bus->number == 0 && devfn == 0) { - u32 t; - - t = PCI_CRP_CMD_WRITE | (where & ~3); - t |= ar71xx_pci_get_ble(where, size, 1); - - DBG("PCI: wr local cfg, ad_cbe:%08x, value:%08x\n", t, value); - - __raw_writel(t, base + PCI_REG_CRP_AD_CBE); - __raw_writel(value, base + PCI_REG_CRP_WRDATA); - } else { - int err; - - err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, - PCI_CFG_CMD_WRITE); - - if (err == 0) - __raw_writel(value, base + PCI_REG_CFG_WRDATA); - else - ret = PCIBIOS_DEVICE_NOT_FOUND; - } - spin_unlock_irqrestore(&ar71xx_pci_lock, flags); - - return ret; -} - -static void ar71xx_pci_fixup(struct pci_dev *dev) -{ - u32 t; - - if (!ar71xx_pci_fixup_enable) - return; - - if (dev->bus->number != 0 || dev->devfn != 0) - return; - - DBG("PCI: fixup host controller %s (%04x:%04x)\n", pci_name(dev), - dev->vendor, dev->device); - - /* setup COMMAND register */ - t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE - | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; - - pci_write_config_word(dev, PCI_COMMAND, t); -} -DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ar71xx_pci_fixup); - -int __init ar71xx_pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, - uint8_t pin) -{ - int irq = -1; - int i; - - slot -= PCI_IDSEL_ADL_START - PCI_IDSEL_BASE; - - for (i = 0; i < ar71xx_pci_nr_irqs; i++) { - struct ar71xx_pci_irq *entry; - - entry = &ar71xx_pci_irq_map[i]; - if (entry->slot == slot && entry->pin == pin) { - irq = entry->irq; - break; - } - } - - if (irq < 0) { - printk(KERN_ALERT "PCI: no irq found for pin%u@%s\n", - pin, pci_name((struct pci_dev *)dev)); - } else { - printk(KERN_INFO "PCI: mapping irq %d to pin%u@%s\n", - irq, pin, pci_name((struct pci_dev *)dev)); - } - - return irq; -} - -static struct pci_ops ar71xx_pci_ops = { - .read = ar71xx_pci_read_config, - .write = ar71xx_pci_write_config, -}; - -static struct resource ar71xx_pci_io_resource = { - .name = "PCI IO space", - .start = 0, - .end = 0, - .flags = IORESOURCE_IO, -}; - -static struct resource ar71xx_pci_mem_resource = { - .name = "PCI memory space", - .start = AR71XX_PCI_MEM_BASE, - .end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1, - .flags = IORESOURCE_MEM -}; - -static struct pci_controller ar71xx_pci_controller = { - .pci_ops = &ar71xx_pci_ops, - .mem_resource = &ar71xx_pci_mem_resource, - .io_resource = &ar71xx_pci_io_resource, -}; - -static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc) -{ - void __iomem *base = ar71xx_reset_base; - u32 pending; - - pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & - __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - - if (pending & PCI_INT_DEV0) - generic_handle_irq(AR71XX_PCI_IRQ_DEV0); - - else if (pending & PCI_INT_DEV1) - generic_handle_irq(AR71XX_PCI_IRQ_DEV1); - - else if (pending & PCI_INT_DEV2) - generic_handle_irq(AR71XX_PCI_IRQ_DEV2); - - else if (pending & PCI_INT_CORE) - generic_handle_irq(AR71XX_PCI_IRQ_CORE); - - else - spurious_interrupt(); -} - -static void ar71xx_pci_irq_unmask(struct irq_data *d) -{ - unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE; - void __iomem *base = ar71xx_reset_base; - u32 t; - - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); - - /* flush write */ - (void) __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -} - -static void ar71xx_pci_irq_mask(struct irq_data *d) -{ - unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE; - void __iomem *base = ar71xx_reset_base; - u32 t; - - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); - - /* flush write */ - (void) __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -} - -static struct irq_chip ar71xx_pci_irq_chip = { - .name = "AR71XX PCI ", - .irq_mask = ar71xx_pci_irq_mask, - .irq_unmask = ar71xx_pci_irq_unmask, - .irq_mask_ack = ar71xx_pci_irq_mask, -}; - -static void __init ar71xx_pci_irq_init(void) -{ - void __iomem *base = ar71xx_reset_base; - int i; - - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); - - for (i = AR71XX_PCI_IRQ_BASE; - i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) - irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, - handle_level_irq); - - irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler); -} - -int __init ar71xx_pcibios_init(void) -{ - void __iomem *ddr_base = ar71xx_ddr_base; - - ar71xx_device_stop(RESET_MODULE_PCI_BUS | RESET_MODULE_PCI_CORE); - ar71xx_pci_delay(); - - ar71xx_device_start(RESET_MODULE_PCI_BUS | RESET_MODULE_PCI_CORE); - ar71xx_pci_delay(); - - ar71xx_pcicfg_base = ioremap_nocache(AR71XX_PCI_CFG_BASE, - AR71XX_PCI_CFG_SIZE); - if (ar71xx_pcicfg_base == NULL) - return -ENOMEM; - - __raw_writel(PCI_WIN0_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN0); - __raw_writel(PCI_WIN1_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN1); - __raw_writel(PCI_WIN2_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN2); - __raw_writel(PCI_WIN3_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN3); - __raw_writel(PCI_WIN4_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN4); - __raw_writel(PCI_WIN5_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN5); - __raw_writel(PCI_WIN6_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN6); - __raw_writel(PCI_WIN7_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN7); - - ar71xx_pci_delay(); - - /* clear bus errors */ - (void)ar71xx_pci_be_handler(1); - - ar71xx_pci_fixup_enable = 1; - ar71xx_pci_irq_init(); - register_pci_controller(&ar71xx_pci_controller); - - return 0; -} diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c deleted file mode 100644 index 57daa0614..000000000 --- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c +++ /dev/null @@ -1,389 +0,0 @@ -/* - * Atheros AR724x PCI host controller driver - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/resource.h> -#include <linux/types.h> -#include <linux/delay.h> -#include <linux/bitops.h> -#include <linux/pci.h> -#include <linux/pci_regs.h> -#include <linux/interrupt.h> - -#include <asm/mach-ar71xx/ar71xx.h> -#include <asm/mach-ar71xx/pci.h> - -#undef DEBUG -#ifdef DEBUG -#define DBG(fmt, args...) printk(KERN_INFO fmt, ## args) -#else -#define DBG(fmt, args...) -#endif - -static void __iomem *ar724x_pci_localcfg_base; -static void __iomem *ar724x_pci_devcfg_base; -static void __iomem *ar724x_pci_ctrl_base; -static int ar724x_pci_fixup_enable; - -static DEFINE_SPINLOCK(ar724x_pci_lock); - -static void ar724x_pci_read(void __iomem *base, int where, int size, u32 *value) -{ - unsigned long flags; - u32 data; - - spin_lock_irqsave(&ar724x_pci_lock, flags); - data = __raw_readl(base + (where & ~3)); - - switch (size) { - case 1: - if (where & 1) - data >>= 8; - if (where & 2) - data >>= 16; - data &= 0xFF; - break; - case 2: - if (where & 2) - data >>= 16; - data &= 0xFFFF; - break; - } - - *value = data; - spin_unlock_irqrestore(&ar724x_pci_lock, flags); -} - -static void ar724x_pci_write(void __iomem *base, int where, int size, u32 value) -{ - unsigned long flags; - u32 data; - int s; - - spin_lock_irqsave(&ar724x_pci_lock, flags); - data = __raw_readl(base + (where & ~3)); - - switch (size) { - case 1: - s = ((where & 3) << 3); - data &= ~(0xFF << s); - data |= ((value & 0xFF) << s); - break; - case 2: - s = ((where & 2) << 3); - data &= ~(0xFFFF << s); - data |= ((value & 0xFFFF) << s); - break; - case 4: - data = value; - break; - } - - __raw_writel(data, base + (where & ~3)); - /* flush write */ - (void)__raw_readl(base + (where & ~3)); - spin_unlock_irqrestore(&ar724x_pci_lock, flags); -} - -static int ar724x_pci_read_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *value) -{ - - if (bus->number != 0 || devfn != 0) - return PCIBIOS_DEVICE_NOT_FOUND; - - ar724x_pci_read(ar724x_pci_devcfg_base, where, size, value); - - DBG("PCI: read config: %02x:%02x.%01x/%02x:%01d, value=%08x\n", - bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), - where, size, *value); - - /* - * WAR for BAR issue - We are unable to access the PCI device space - * if we set the BAR with proper base address - */ - if ((where == 0x10) && (size == 4)) { - u32 val; - val = (ar71xx_soc == AR71XX_SOC_AR7240) ? 0xffff : 0x1000ffff; - ar724x_pci_write(ar724x_pci_devcfg_base, where, size, val); - } - - return PCIBIOS_SUCCESSFUL; -} - -static int ar724x_pci_write_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 value) -{ - if (bus->number != 0 || devfn != 0) - return PCIBIOS_DEVICE_NOT_FOUND; - - DBG("PCI: write config: %02x:%02x.%01x/%02x:%01d, value=%08x\n", - bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), - where, size, value); - - ar724x_pci_write(ar724x_pci_devcfg_base, where, size, value); - - return PCIBIOS_SUCCESSFUL; -} - -static void ar724x_pci_fixup(struct pci_dev *dev) -{ - u16 cmd; - - if (!ar724x_pci_fixup_enable) - return; - - if (dev->bus->number != 0 || dev->devfn != 0) - return; - - /* setup COMMAND register */ - pci_read_config_word(dev, PCI_COMMAND, &cmd); - cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | - PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | - PCI_COMMAND_FAST_BACK; - - pci_write_config_word(dev, PCI_COMMAND, cmd); -} -DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ar724x_pci_fixup); - -int __init ar724x_pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, - uint8_t pin) -{ - int irq = -1; - int i; - - for (i = 0; i < ar71xx_pci_nr_irqs; i++) { - struct ar71xx_pci_irq *entry; - entry = &ar71xx_pci_irq_map[i]; - - if (entry->slot == slot && entry->pin == pin) { - irq = entry->irq; - break; - } - } - - if (irq < 0) - printk(KERN_ALERT "PCI: no irq found for pin%u@%s\n", - pin, pci_name((struct pci_dev *)dev)); - else - printk(KERN_INFO "PCI: mapping irq %d to pin%u@%s\n", - irq, pin, pci_name((struct pci_dev *)dev)); - - return irq; -} - -static struct pci_ops ar724x_pci_ops = { - .read = ar724x_pci_read_config, - .write = ar724x_pci_write_config, -}; - -static struct resource ar724x_pci_io_resource = { - .name = "PCI IO space", - .start = 0, - .end = 0, - .flags = IORESOURCE_IO, -}; - -static struct resource ar724x_pci_mem_resource = { - .name = "PCI memory space", - .start = AR71XX_PCI_MEM_BASE, - .end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1, - .flags = IORESOURCE_MEM -}; - -static struct pci_controller ar724x_pci_controller = { - .pci_ops = &ar724x_pci_ops, - .mem_resource = &ar724x_pci_mem_resource, - .io_resource = &ar724x_pci_io_resource, -}; - -static void __init ar724x_pci_reset(void) -{ - ar71xx_device_stop(AR724X_RESET_PCIE); - ar71xx_device_stop(AR724X_RESET_PCIE_PHY); - ar71xx_device_stop(AR724X_RESET_PCIE_PHY_SERIAL); - udelay(100); - - ar71xx_device_start(AR724X_RESET_PCIE_PHY_SERIAL); - udelay(100); - ar71xx_device_start(AR724X_RESET_PCIE_PHY); - ar71xx_device_start(AR724X_RESET_PCIE); -} - -static int __init ar724x_pci_setup(void) -{ - void __iomem *base = ar724x_pci_ctrl_base; - u32 t; - - /* setup COMMAND register */ - t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE | - PCI_COMMAND_PARITY|PCI_COMMAND_SERR|PCI_COMMAND_FAST_BACK; - - ar724x_pci_write(ar724x_pci_localcfg_base, PCI_COMMAND, 4, t); - ar724x_pci_write(ar724x_pci_localcfg_base, 0x20, 4, 0x1ff01000); - ar724x_pci_write(ar724x_pci_localcfg_base, 0x24, 4, 0x1ff01000); - - t = __raw_readl(base + AR724X_PCI_REG_RESET); - if (t != 0x7) { - udelay(100000); - __raw_writel(0, base + AR724X_PCI_REG_RESET); - udelay(100); - __raw_writel(4, base + AR724X_PCI_REG_RESET); - udelay(100000); - } - - if (ar71xx_soc == AR71XX_SOC_AR7240) - t = AR724X_PCI_APP_LTSSM_ENABLE; - else - t = 0x1ffc1; - __raw_writel(t, base + AR724X_PCI_REG_APP); - /* flush write */ - (void) __raw_readl(base + AR724X_PCI_REG_APP); - udelay(1000); - - t = __raw_readl(base + AR724X_PCI_REG_RESET); - if ((t & AR724X_PCI_RESET_LINK_UP) == 0x0) { - printk(KERN_WARNING "PCI: no PCIe module found\n"); - return -ENODEV; - } - - if (ar71xx_soc == AR71XX_SOC_AR7241 || - ar71xx_soc == AR71XX_SOC_AR7242) { - t = __raw_readl(base + AR724X_PCI_REG_APP); - t |= BIT(16); - __raw_writel(t, base + AR724X_PCI_REG_APP); - } - - return 0; -} - -static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc) -{ - void __iomem *base = ar724x_pci_ctrl_base; - u32 pending; - - pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & - __raw_readl(base + AR724X_PCI_REG_INT_MASK); - - if (pending & AR724X_PCI_INT_DEV0) - generic_handle_irq(AR71XX_PCI_IRQ_DEV0); - - else - spurious_interrupt(); -} - -static void ar724x_pci_irq_unmask(struct irq_data *d) -{ - void __iomem *base = ar724x_pci_ctrl_base; - u32 t; - - switch (d->irq) { - case AR71XX_PCI_IRQ_DEV0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t | AR724X_PCI_INT_DEV0, - base + AR724X_PCI_REG_INT_MASK); - /* flush write */ - (void) __raw_readl(base + AR724X_PCI_REG_INT_MASK); - } -} - -static void ar724x_pci_irq_mask(struct irq_data *d) -{ - void __iomem *base = ar724x_pci_ctrl_base; - u32 t; - - switch (d->irq) { - case AR71XX_PCI_IRQ_DEV0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t & ~AR724X_PCI_INT_DEV0, - base + AR724X_PCI_REG_INT_MASK); - - /* flush write */ - (void) __raw_readl(base + AR724X_PCI_REG_INT_MASK); - - t = __raw_readl(base + AR724X_PCI_REG_INT_STATUS); - __raw_writel(t | AR724X_PCI_INT_DEV0, - base + AR724X_PCI_REG_INT_STATUS); - - /* flush write */ - (void) __raw_readl(base + AR724X_PCI_REG_INT_STATUS); - } -} - -static struct irq_chip ar724x_pci_irq_chip = { - .name = "AR724X PCI ", - .irq_mask = ar724x_pci_irq_mask, - .irq_unmask = ar724x_pci_irq_unmask, - .irq_mask_ack = ar724x_pci_irq_mask, -}; - -static void __init ar724x_pci_irq_init(int irq) -{ - void __iomem *base = ar724x_pci_ctrl_base; - u32 t; - int i; - - t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE); - if (t & (AR724X_RESET_PCIE | AR724X_RESET_PCIE_PHY | - AR724X_RESET_PCIE_PHY_SERIAL)) { - return; - } - - __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); - __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); - - for (i = AR71XX_PCI_IRQ_BASE; - i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) - irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, - handle_level_irq); - - irq_set_chained_handler(irq, ar724x_pci_irq_handler); -} - -int __init ar724x_pcibios_init(int irq) -{ - int ret = -ENOMEM; - - ar724x_pci_localcfg_base = ioremap_nocache(AR724X_PCI_CRP_BASE, - AR724X_PCI_CRP_SIZE); - if (ar724x_pci_localcfg_base == NULL) - goto err; - - ar724x_pci_devcfg_base = ioremap_nocache(AR724X_PCI_CFG_BASE, - AR724X_PCI_CFG_SIZE); - if (ar724x_pci_devcfg_base == NULL) - goto err_unmap_localcfg; - - ar724x_pci_ctrl_base = ioremap_nocache(AR724X_PCI_CTRL_BASE, - AR724X_PCI_CTRL_SIZE); - if (ar724x_pci_ctrl_base == NULL) - goto err_unmap_devcfg; - - ar724x_pci_reset(); - ret = ar724x_pci_setup(); - if (ret) - goto err_unmap_ctrl; - - ar724x_pci_fixup_enable = 1; - ar724x_pci_irq_init(irq); - register_pci_controller(&ar724x_pci_controller); - - return 0; - -err_unmap_ctrl: - iounmap(ar724x_pci_ctrl_base); -err_unmap_devcfg: - iounmap(ar724x_pci_devcfg_base); -err_unmap_localcfg: - iounmap(ar724x_pci_localcfg_base); -err: - return ret; -} |