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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2011-11-13 11:26:59 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2011-11-13 11:26:59 +0000
commit228681e32837b876341ccd663be72b55a05319c9 (patch)
treebe16d09001dcf62cafaa121162d09943ec2a4ef0 /target/linux/ar71xx/files/arch/mips
parent7571fae3abbeefc6eb9f6dd243edb04a589bd122 (diff)
ar71xx: set MII interface speed from the set_speed callbacks
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29013 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/devices.c34
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h5
2 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
index b13181845..be1e603d8 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
@@ -206,6 +206,36 @@ static void __init ar71xx_mii_ctrl_set_if(unsigned int reg,
iounmap(base);
}
+static void ar71xx_mii_ctrl_set_speed(unsigned int reg, unsigned int speed)
+{
+ void __iomem *base;
+ unsigned int mii_speed;
+ u32 t;
+
+ switch (speed) {
+ case SPEED_10:
+ mii_speed = MII_CTRL_SPEED_10;
+ break;
+ case SPEED_100:
+ mii_speed = MII_CTRL_SPEED_100;
+ break;
+ case SPEED_1000:
+ mii_speed = MII_CTRL_SPEED_1000;
+ break;
+ default:
+ BUG();
+ }
+
+ base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE);
+
+ t = __raw_readl(base + reg);
+ t &= ~(MII_CTRL_SPEED_MASK << MII_CTRL_SPEED_SHIFT);
+ t |= mii_speed << MII_CTRL_SPEED_SHIFT;
+ __raw_writel(t, base + reg);
+
+ iounmap(base);
+}
+
void __init ar71xx_add_device_mdio(unsigned int id, u32 phy_mask)
{
struct platform_device *mdio_dev;
@@ -321,6 +351,7 @@ static void ar71xx_set_speed_ge0(int speed)
ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
val, AR71XX_ETH0_PLL_SHIFT);
+ ar71xx_mii_ctrl_set_speed(MII_REG_MII0_CTRL, speed);
}
static void ar71xx_set_speed_ge1(int speed)
@@ -329,6 +360,7 @@ static void ar71xx_set_speed_ge1(int speed)
ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
val, AR71XX_ETH1_PLL_SHIFT);
+ ar71xx_mii_ctrl_set_speed(MII_REG_MII1_CTRL, speed);
}
static void ar724x_set_speed_ge0(int speed)
@@ -357,6 +389,7 @@ static void ar91xx_set_speed_ge0(int speed)
ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
val, AR91XX_ETH0_PLL_SHIFT);
+ ar71xx_mii_ctrl_set_speed(MII_REG_MII0_CTRL, speed);
}
static void ar91xx_set_speed_ge1(int speed)
@@ -365,6 +398,7 @@ static void ar91xx_set_speed_ge1(int speed)
ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
val, AR91XX_ETH1_PLL_SHIFT);
+ ar71xx_mii_ctrl_set_speed(MII_REG_MII1_CTRL, speed);
}
static void ar933x_set_speed_ge0(int speed)
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index c447e3e8f..db5bac7a0 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -817,6 +817,11 @@ void ar71xx_flash_release(void);
#define MII_REG_MII1_CTRL 0x04
#define MII_CTRL_IF_MASK 3
+#define MII_CTRL_SPEED_SHIFT 4
+#define MII_CTRL_SPEED_MASK 3
+#define MII_CTRL_SPEED_10 0
+#define MII_CTRL_SPEED_100 1
+#define MII_CTRL_SPEED_1000 2
#define MII0_CTRL_IF_GMII 0
#define MII0_CTRL_IF_MII 1