summaryrefslogtreecommitdiffstats
path: root/target/linux/ar7/files/include/asm-mips
diff options
context:
space:
mode:
authornico <nico@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-09-06 19:35:08 +0000
committernico <nico@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-09-06 19:35:08 +0000
commit4aac3b42a23c57e7e4076ee7805432995025a278 (patch)
tree66e66194ab2d23f789cf674b60a561fbccefc379 /target/linux/ar7/files/include/asm-mips
parenta8c9d0167eff9272df3a03b9a149dd386fe2f677 (diff)
cosmetic fixes for ar7: indent, use lowercase hex notation, format
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8656 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar7/files/include/asm-mips')
-rw-r--r--target/linux/ar7/files/include/asm-mips/ar7/ar7.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/target/linux/ar7/files/include/asm-mips/ar7/ar7.h b/target/linux/ar7/files/include/asm-mips/ar7/ar7.h
index ae1d4192b..5ed005e8d 100644
--- a/target/linux/ar7/files/include/asm-mips/ar7/ar7.h
+++ b/target/linux/ar7/files/include/asm-mips/ar7/ar7.h
@@ -33,9 +33,9 @@
#define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00)
#define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600)
#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
-#define AR7_REGS_DCL (AR7_REGS_BASE + 0x1A00)
-#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1C00)
-#define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1E00)
+#define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00)
+#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00)
+#define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)
#define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)
#define AR7_REGS_MAC1 (AR7_REGS_BASE + 0x2800)
@@ -43,9 +43,9 @@
#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
-#define AR7_RESET_PEREPHERIAL 0x0
-#define AR7_RESET_SOFTWARE 0x4
-#define AR7_RESET_STATUS 0x8
+#define AR7_RESET_PEREPHERIAL 0x0
+#define AR7_RESET_SOFTWARE 0x4
+#define AR7_RESET_STATUS 0x8
#define AR7_RESET_BIT_CPMAC_LO 17
#define AR7_RESET_BIT_CPMAC_HI 21
@@ -53,10 +53,10 @@
#define AR7_RESET_BIT_EPHY 26
/* GPIO control registers */
-#define AR7_GPIO_INPUT 0x0
-#define AR7_GPIO_OUTPUT 0x4
-#define AR7_GPIO_DIR 0x8
-#define AR7_GPIO_ENABLE 0xC
+#define AR7_GPIO_INPUT 0x0
+#define AR7_GPIO_OUTPUT 0x4
+#define AR7_GPIO_DIR 0x8
+#define AR7_GPIO_ENABLE 0xc
#define AR7_CHIP_7100 0x18
#define AR7_CHIP_7200 0x2b