IRQ handler rewrite by Gabor Juhos, uses C no longer assembly

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7464 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 42 insertions, 22 deletions

diff --git a/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c b/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c
index 91dae8999..ff768033e 100644
--- a/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c
+++ b/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c
@@ -1,17 +1,36 @@
 /*
- *	Copyright (C) ADMtek Incorporated.
- *	Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
- *	Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
- *	Copyright (C) 2007 OpenWrt.org
+ *  $Id$
+ *
+ *  ADM5120 specific PCI operations
+ *
+ *  Copyright (C) ADMtek Incorporated.
+ *  Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ *  Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
+ *  Copyright (C) 2007 OpenWrt.org
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version 2
+ *  of the License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the
+ *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ *  Boston, MA  02110-1301, USA.
+ *
  */
 
-#include <linux/autoconf.h>
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 
-#include <adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
 
 volatile u32* pci_config_address_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_ADDR);
 volatile u32* pci_config_data_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA);
@@ -24,14 +43,15 @@ static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
 	*pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
 	    ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
 	switch (size) {
-		case 1:
-			*val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff;
-			break;
-		case 2:
-			*val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff;
-			break;
-		default:
-			*val = (*pci_config_data_reg);
+	case 1:
+		*val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff;
+		break;
+	case 2:
+		*val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff;
+		break;
+	default:
+		*val = (*pci_config_data_reg);
+		break;
 	}
 	return PCIBIOS_SUCCESSFUL;
 }
@@ -42,16 +62,16 @@ static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
 	*pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
 	    ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
 	switch (size) {
-		case 1:
-			*(volatile u8 *)(((int)pci_config_data_reg) +
+	case 1:
+		*(volatile u8 *)(((int)pci_config_data_reg) +
 			    (where & 3)) = val;
-			break;
-		case 2:
-			*(volatile u16 *)(((int)pci_config_data_reg) +
+		break;
+	case 2:
+		*(volatile u16 *)(((int)pci_config_data_reg) +
 			    (where & 2)) = (val);
-			break;
-		default:
-			*pci_config_data_reg = (val);
+		break;
+	default:
+		*pci_config_data_reg = (val);
 	}
 
 	return PCIBIOS_SUCCESSFUL;