[lantiq] drop unmaintained packages

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33723 3c298f89-4303-0410-b956-a3cf2f4a3e73

10 files changed, 0 insertions, 893 deletions

diff --git a/package/uboot-lantiq/files/cpu/mips/ar9-clock.c b/package/uboot-lantiq/files/cpu/mips/ar9-clock.c
deleted file mode 100644
index a8aecb422..000000000
--- a/package/uboot-lantiq/files/cpu/mips/ar9-clock.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/ar9.h>
-
-ulong ifx_get_ddr_hz(void)
-{
-	switch((*AR9_CGU_SYS) & 0x05) {
-		case 0x01: 
-		case 0x05: 
-		return CLOCK_111M;
-	
-		case 0x00: 
-		case 0x04: 
-		return CLOCK_166M;
-	}
-
-	return 0;
-}
-
-ulong ifx_get_cpuclk(void)
-{
-	switch((*AR9_CGU_SYS) & 0x05) {
-		case 0x00: 
-		case 0x01: 
-		return CLOCK_333M;
-
-		case 0x04: 
-		return CLOCK_166M;
-
-		case 0x05: 
-		return CLOCK_111M;
-	}
-
-	return 0;
-}
-
-ulong get_bus_freq(ulong dummy)
-{
-	unsigned int ddr_clock=ifx_get_ddr_hz();
-	if((*AR9_CGU_SYS) & 0x40){
-		return ddr_clock/2;
-	} else {
-		return ddr_clock;
-	}
-}
diff --git a/package/uboot-lantiq/files/cpu/mips/ar9/Makefile b/package/uboot-lantiq/files/cpu/mips/ar9/Makefile
deleted file mode 100644
index c48d02eaa..000000000
--- a/package/uboot-lantiq/files/cpu/mips/ar9/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#########################################################################
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(SOC).a
-
-COBJS	= clock.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all:	$(obj).depend $(LIB)
-
-$(LIB):	$(OBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/package/uboot-lantiq/files/cpu/mips/ar9/clock.c b/package/uboot-lantiq/files/cpu/mips/ar9/clock.c
deleted file mode 100644
index a8aecb422..000000000
--- a/package/uboot-lantiq/files/cpu/mips/ar9/clock.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/ar9.h>
-
-ulong ifx_get_ddr_hz(void)
-{
-	switch((*AR9_CGU_SYS) & 0x05) {
-		case 0x01: 
-		case 0x05: 
-		return CLOCK_111M;
-	
-		case 0x00: 
-		case 0x04: 
-		return CLOCK_166M;
-	}
-
-	return 0;
-}
-
-ulong ifx_get_cpuclk(void)
-{
-	switch((*AR9_CGU_SYS) & 0x05) {
-		case 0x00: 
-		case 0x01: 
-		return CLOCK_333M;
-
-		case 0x04: 
-		return CLOCK_166M;
-
-		case 0x05: 
-		return CLOCK_111M;
-	}
-
-	return 0;
-}
-
-ulong get_bus_freq(ulong dummy)
-{
-	unsigned int ddr_clock=ifx_get_ddr_hz();
-	if((*AR9_CGU_SYS) & 0x40){
-		return ddr_clock/2;
-	} else {
-		return ddr_clock;
-	}
-}
diff --git a/package/uboot-lantiq/files/cpu/mips/ar9/ifx_cache.S b/package/uboot-lantiq/files/cpu/mips/ar9/ifx_cache.S
deleted file mode 100644
index fc482dcd6..000000000
--- a/package/uboot-lantiq/files/cpu/mips/ar9/ifx_cache.S
+++ /dev/null
@@ -1,60 +0,0 @@
-
-#define IFX_CACHE_EXTRA_INVALID_TAG						\
-	mtc0	zero, CP0_TAGLO, 1;						\
-	mtc0	zero, CP0_TAGLO, 2;						\
-	mtc0	zero, CP0_TAGLO, 3;						\
-	mtc0	zero, CP0_TAGLO, 4;
-
-#define IFX_CACHE_EXTRA_OPERATION						\
-	/* set WST bit */							\
-	mfc0	a0, CP0_ECC;							\
-	li	a1, ECCF_WST;							\
-	or	a0, a1;								\
-	mtc0	a0, CP0_ECC;							\
-										\
-	li	a0, K0BASE;							\
-	move	a2, t2;		/* icacheSize */				\
-	move	a3, t4;		/* icacheLineSize */				\
-	move	a1, a2;								\
-	icacheop(a0,a1,a2,a3,(Index_Store_Tag_I));				\
-										\
-	/* clear WST bit */							\
-	mfc0	a0, CP0_ECC;							\
-	li	a1, ~ECCF_WST;							\
-	and	a0, a1;								\
-	mtc0	a0, CP0_ECC;							\
-										\
-	/* 1: initialise dcache tags. */					\
-										\
-	/* cache line size */							\
-	li	a2, CFG_CACHELINE_SIZE;						\
-	/* kseg0 mem address */							\
-	li	a1, 0;								\
-	li	a3, CFG_CACHE_SETS * CFG_CACHE_WAYS;				\
-1:										\
-	/* store tag (invalid, not locked) */					\
-	cache 0x8, 0(a1);							\
-	cache 0x9, 0(a1);							\
-										\
-	add	a3, -1;								\
-	bne	a3, zero, 1b;							\
-	add	a1, a2;								\
-										\
-	/* set WST bit */							\
-	mfc0	a0, CP0_ECC;							\
-	li	a1, ECCF_WST;							\
-	or	a0, a1;								\
-	mtc0	a0, CP0_ECC;							\
-										\
-	li	a0, K0BASE;							\
-	move	a2, t3;		/* dcacheSize */				\
-	move	a3, t5;		/* dcacheLineSize */				\
-	move	a1, a2;								\
-	icacheop(a0,a1,a2,a3,(Index_Store_Tag_D));				\
-										\
-	/* clear WST bit */							\
-	mfc0	a0, CP0_ECC;							\
-	li	a1, ~ECCF_WST;							\
-	and	a0, a1;								\
-	mtc0	a0, CP0_ECC;
-
diff --git a/package/uboot-lantiq/files/cpu/mips/danube-clock.c b/package/uboot-lantiq/files/cpu/mips/danube-clock.c
deleted file mode 100644
index 4219f8f92..000000000
--- a/package/uboot-lantiq/files/cpu/mips/danube-clock.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/danube.h>
-
-ulong ifx_get_ddr_hz(void)
-{
-	static const ulong ddr_freq[] = {166666667,133333333,111111111,83333333};
-	return ddr_freq[((*DANUBE_CGU_SYS) & 0x3)];
-}
-
-ulong ifx_get_cpuclk(void)
-{
-#ifdef CONFIG_USE_EMULATOR
-	return EMULATOR_CPU_SPEED;
-#else //NOT CONFIG_USE_EMULATOR
-	unsigned int ddr_clock=ifx_get_ddr_hz();
-	switch((*DANUBE_CGU_SYS) & 0xc){
-		case 0:
-		default:
-			return 323333333;
-		case 4:
-			return ddr_clock;
-		case 8:
-			return ddr_clock << 1;
-	}
-#endif
-}
-
-ulong get_bus_freq(ulong dummy)
-{
-#ifdef CONFIG_USE_EMULATOR
-	unsigned int  clkCPU;
-	clkCPU = ifx_get_cpuclk();
-	return clkCPU >> 2;
-#else //NOT CONFIG_USE_EMULATOR
-	unsigned int ddr_clock=ifx_get_ddr_hz();
-	if ((*DANUBE_CGU_SYS) & 0x40){
-		return ddr_clock >> 1;
-	}
-	return ddr_clock;
-#endif
-}
-
diff --git a/package/uboot-lantiq/files/cpu/mips/danube/Makefile b/package/uboot-lantiq/files/cpu/mips/danube/Makefile
deleted file mode 100644
index c48d02eaa..000000000
--- a/package/uboot-lantiq/files/cpu/mips/danube/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#########################################################################
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(SOC).a
-
-COBJS	= clock.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all:	$(obj).depend $(LIB)
-
-$(LIB):	$(OBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/package/uboot-lantiq/files/cpu/mips/danube/clock.c b/package/uboot-lantiq/files/cpu/mips/danube/clock.c
deleted file mode 100644
index 4219f8f92..000000000
--- a/package/uboot-lantiq/files/cpu/mips/danube/clock.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/danube.h>
-
-ulong ifx_get_ddr_hz(void)
-{
-	static const ulong ddr_freq[] = {166666667,133333333,111111111,83333333};
-	return ddr_freq[((*DANUBE_CGU_SYS) & 0x3)];
-}
-
-ulong ifx_get_cpuclk(void)
-{
-#ifdef CONFIG_USE_EMULATOR
-	return EMULATOR_CPU_SPEED;
-#else //NOT CONFIG_USE_EMULATOR
-	unsigned int ddr_clock=ifx_get_ddr_hz();
-	switch((*DANUBE_CGU_SYS) & 0xc){
-		case 0:
-		default:
-			return 323333333;
-		case 4:
-			return ddr_clock;
-		case 8:
-			return ddr_clock << 1;
-	}
-#endif
-}
-
-ulong get_bus_freq(ulong dummy)
-{
-#ifdef CONFIG_USE_EMULATOR
-	unsigned int  clkCPU;
-	clkCPU = ifx_get_cpuclk();
-	return clkCPU >> 2;
-#else //NOT CONFIG_USE_EMULATOR
-	unsigned int ddr_clock=ifx_get_ddr_hz();
-	if ((*DANUBE_CGU_SYS) & 0x40){
-		return ddr_clock >> 1;
-	}
-	return ddr_clock;
-#endif
-}
-
diff --git a/package/uboot-lantiq/files/cpu/mips/danube/ifx_cache.S b/package/uboot-lantiq/files/cpu/mips/danube/ifx_cache.S
deleted file mode 100644
index fc482dcd6..000000000
--- a/package/uboot-lantiq/files/cpu/mips/danube/ifx_cache.S
+++ /dev/null
@@ -1,60 +0,0 @@
-
-#define IFX_CACHE_EXTRA_INVALID_TAG						\
-	mtc0	zero, CP0_TAGLO, 1;						\
-	mtc0	zero, CP0_TAGLO, 2;						\
-	mtc0	zero, CP0_TAGLO, 3;						\
-	mtc0	zero, CP0_TAGLO, 4;
-
-#define IFX_CACHE_EXTRA_OPERATION						\
-	/* set WST bit */							\
-	mfc0	a0, CP0_ECC;							\
-	li	a1, ECCF_WST;							\
-	or	a0, a1;								\
-	mtc0	a0, CP0_ECC;							\
-										\
-	li	a0, K0BASE;							\
-	move	a2, t2;		/* icacheSize */				\
-	move	a3, t4;		/* icacheLineSize */				\
-	move	a1, a2;								\
-	icacheop(a0,a1,a2,a3,(Index_Store_Tag_I));				\
-										\
-	/* clear WST bit */							\
-	mfc0	a0, CP0_ECC;							\
-	li	a1, ~ECCF_WST;							\
-	and	a0, a1;								\
-	mtc0	a0, CP0_ECC;							\
-										\
-	/* 1: initialise dcache tags. */					\
-										\
-	/* cache line size */							\
-	li	a2, CFG_CACHELINE_SIZE;						\
-	/* kseg0 mem address */							\
-	li	a1, 0;								\
-	li	a3, CFG_CACHE_SETS * CFG_CACHE_WAYS;				\
-1:										\
-	/* store tag (invalid, not locked) */					\
-	cache 0x8, 0(a1);							\
-	cache 0x9, 0(a1);							\
-										\
-	add	a3, -1;								\
-	bne	a3, zero, 1b;							\
-	add	a1, a2;								\
-										\
-	/* set WST bit */							\
-	mfc0	a0, CP0_ECC;							\
-	li	a1, ECCF_WST;							\
-	or	a0, a1;								\
-	mtc0	a0, CP0_ECC;							\
-										\
-	li	a0, K0BASE;							\
-	move	a2, t3;		/* dcacheSize */				\
-	move	a3, t5;		/* dcacheLineSize */				\
-	move	a1, a2;								\
-	icacheop(a0,a1,a2,a3,(Index_Store_Tag_D));				\
-										\
-	/* clear WST bit */							\
-	mfc0	a0, CP0_ECC;							\
-	li	a1, ~ECCF_WST;							\
-	and	a0, a1;								\
-	mtc0	a0, CP0_ECC;
-
diff --git a/package/uboot-lantiq/files/cpu/mips/ifx_asc.c b/package/uboot-lantiq/files/cpu/mips/ifx_asc.c
deleted file mode 100644
index 5c13f2662..000000000
--- a/package/uboot-lantiq/files/cpu/mips/ifx_asc.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) Copyright 2009
- * Infineon Technologies AG, http://www.infineon.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/io.h>
-#include <asm/addrspace.h>
-
-#include "ifx_asc.h"
-
-#define SET_BIT(reg, mask)			asc_writel(reg, asc_readl(reg) | (mask))
-#define CLEAR_BIT(reg, mask)			asc_writel(reg, asc_readl(reg) & (~mask))
-#define SET_BITFIELD(reg, mask, off, val)	asc_writel(reg, (asc_readl(reg) & (~mask)) | (val << off) )
-
-#undef DEBUG_ASC_RAW
-#ifdef DEBUG_ASC_RAW
-#define DEBUG_ASC_RAW_RX_BUF			0xA0800000
-#define DEBUG_ASC_RAW_TX_BUF			0xA0900000
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static IfxAsc_t *pAsc = (IfxAsc_t *)CKSEG1ADDR(CONFIG_SYS_IFX_ASC_BASE);
-
-/*
- *             FDV            fASC
- * BaudRate = ----- * --------------------
- *             512    16 * (ReloadValue+1)
- */
-
-/*
- *                  FDV          fASC
- * ReloadValue = ( ----- * --------------- ) - 1
- *                  512     16 * BaudRate
- */
-static void serial_divs(u32 baudrate, u32 fasc, u32 *pfdv, u32 *preload)
-{
-   u32 clock = fasc / 16;
-
-   u32 fdv; /* best fdv */
-   u32 reload = 0; /* best reload */
-   u32 diff; /* smallest diff */
-   u32 idiff; /* current diff */
-   u32 ireload; /* current reload */
-   u32 i; /* current fdv */
-   u32 result; /* current resulting baudrate */
-
-   if (clock > 0x7FFFFF)
-      clock /= 512;
-   else
-      baudrate *= 512;
-
-   fdv = 512; /* start with 1:1 fraction */
-   diff = baudrate; /* highest possible */
-
-   /* i is the test fdv value -- start with the largest possible */
-   for (i = 512; i > 0; i--)
-   {
-      ireload = (clock * i) / baudrate;
-      if (ireload < 1)
-         break; /* already invalid */
-      result = (clock * i) / ireload;
-
-      idiff = (result > baudrate) ? (result - baudrate) : (baudrate - result);
-      if (idiff == 0)
-      {
-         fdv = i;
-         reload = ireload;
-         break; /* can't do better */
-      }
-      else if (idiff < diff)
-      {
-         fdv = i; /* best so far */
-         reload = ireload;
-         diff = idiff; /* update lowest diff*/
-      }
-   }
-
-   *pfdv = (fdv == 512) ? 0 : fdv;
-   *preload = reload - 1;
-}
-
-
-void serial_setbrg (void)
-{
-	u32 ReloadValue, fdv;
-
-	serial_divs(gd->baudrate, get_bus_freq(0), &fdv, &ReloadValue);
-
-	/* Disable Baud Rate Generator; BG should only be written when R=0 */
-	CLEAR_BIT(asc_con, ASCCON_R);
-
-	/* Enable Fractional Divider */
-	SET_BIT(asc_con, ASCCON_FDE);	/* FDE = 1 */
-
-	/* Set fractional divider value */
-	asc_writel(asc_fdv, fdv & ASCFDV_VALUE_MASK);
-
-	/* Set reload value in BG */
-	asc_writel(asc_bg, ReloadValue);
-
-	/* Enable Baud Rate Generator */
-	SET_BIT(asc_con, ASCCON_R);	/* R = 1 */
-}
-
-
-int serial_init (void)
-{
-
-	/* and we have to set CLC register*/
-	CLEAR_BIT(asc_clc, ASCCLC_DISS);
-	SET_BITFIELD(asc_clc, ASCCLC_RMCMASK, ASCCLC_RMCOFFSET, 0x0001);
-
-	/* initialy we are in async mode */
-	asc_writel(asc_con, ASCCON_M_8ASYNC);
-
-	/* select input port */
-	asc_writel(asc_pisel, CONSOLE_TTY & 0x1);
-
-	/* TXFIFO's filling level */
-	SET_BITFIELD(asc_txfcon, ASCTXFCON_TXFITLMASK,
-			ASCTXFCON_TXFITLOFF, ASC_TXFIFO_FL);
-	/* enable TXFIFO */
-	SET_BIT(asc_txfcon, ASCTXFCON_TXFEN);
-
-	/* RXFIFO's filling level */
-	SET_BITFIELD(asc_txfcon, ASCRXFCON_RXFITLMASK,
-			ASCRXFCON_RXFITLOFF, ASC_RXFIFO_FL);
-	/* enable RXFIFO */
-	SET_BIT(asc_rxfcon, ASCRXFCON_RXFEN);
-
-	/* set baud rate */
-	serial_setbrg();
-
-	/* enable error signals &  Receiver enable  */
-	SET_BIT(asc_whbstate, ASCWHBSTATE_SETREN|ASCCON_FEN|ASCCON_TOEN|ASCCON_ROEN);
-
-	return 0;
-}
-
-
-void serial_putc (const char c)
-{
-	u32 txFl = 0;
-#ifdef DEBUG_ASC_RAW
-	static u8 * debug = (u8 *) DEBUG_ASC_RAW_TX_BUF;
-	*debug++=c;
-#endif
-	if (c == '\n')
-		serial_putc ('\r');
-	/* check do we have a free space in the TX FIFO */
-	/* get current filling level */
-	do {
-		txFl = ( asc_readl(asc_fstat) & ASCFSTAT_TXFFLMASK ) >> ASCFSTAT_TXFFLOFF;
-	}
-	while ( txFl == ASC_TXFIFO_FULL );
-
-	asc_writel(asc_tbuf, c); /* write char to Transmit Buffer Register */
-
-	/* check for errors */
-	if ( asc_readl(asc_state) & ASCSTATE_TOE ) {
-		SET_BIT(asc_whbstate, ASCWHBSTATE_CLRTOE);
-		return;
-	}
-}
-
-void serial_puts (const char *s)
-{
-	while (*s) {
-		serial_putc (*s++);
-	}
-}
-
-int serial_getc (void)
-{
-	char c;
-	while ((asc_readl(asc_fstat) & ASCFSTAT_RXFFLMASK) == 0 );
-	c = (char)(asc_readl(asc_rbuf) & 0xff);
-
-#ifdef 	DEBUG_ASC_RAW
-	static u8* debug=(u8*)(DEBUG_ASC_RAW_RX_BUF);
-	*debug++=c;
-#endif
-	return c;
-}
-
-
-int serial_tstc (void)
-{
-	int res = 1;
-
-	if ( (asc_readl(asc_fstat) & ASCFSTAT_RXFFLMASK) == 0 ) {
-		res = 0;
-	}
-	return res;
-}
diff --git a/package/uboot-lantiq/files/cpu/mips/ifx_asc.h b/package/uboot-lantiq/files/cpu/mips/ifx_asc.h
deleted file mode 100644
index 2d3a49e1e..000000000
--- a/package/uboot-lantiq/files/cpu/mips/ifx_asc.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/*****************************************************************************
- * DANUBE BootROM
- * Copyright (c) 2005, Infineon Technologies AG, All rights reserved
- * IFAP DC COM SD
- *****************************************************************************/
-#ifndef __ASC_H
-#define __ASC_H
-
-/* channel operating modes */
-#define	ASCOPT_CSIZE		0x00000003
-#define	ASCOPT_CS7		0x00000001
-#define	ASCOPT_CS8		0x00000002
-#define	ASCOPT_PARENB		0x00000004
-#define	ASCOPT_STOPB		0x00000008
-#define	ASCOPT_PARODD		0x00000010
-#define	ASCOPT_CREAD		0x00000020
-
-#define ASC_OPTIONS		(ASCOPT_CREAD | ASCOPT_CS8)
-
-/* ASC input select (0 or 1) */
-#define CONSOLE_TTY		0
-
-#define ASC_TXFIFO_FL		1
-#define ASC_RXFIFO_FL		1
-#define ASC_TXFIFO_FULL		16
-
-/* CLC register's bits and bitfields */
-#define ASCCLC_DISR		0x00000001
-#define ASCCLC_DISS		0x00000002
-#define ASCCLC_RMCMASK		0x0000FF00
-#define ASCCLC_RMCOFFSET	8
-
-/* CON register's bits and bitfields */
-#define ASCCON_MODEMASK		0x0000000f
-#define ASCCON_M_8ASYNC		0x0
-#define ASCCON_M_8IRDA		0x1
-#define ASCCON_M_7ASYNC		0x2
-#define ASCCON_M_7IRDA		0x3
-#define ASCCON_WLSMASK		0x0000000c
-#define ASCCON_WLSOFFSET	2
-#define ASCCON_WLS_8BIT		0x0
-#define ASCCON_WLS_7BIT		0x1
-#define ASCCON_PEN		0x00000010
-#define ASCCON_ODD		0x00000020
-#define ASCCON_SP		0x00000040
-#define ASCCON_STP		0x00000080
-#define ASCCON_BRS		0x00000100
-#define ASCCON_FDE		0x00000200
-#define ASCCON_ERRCLK		0x00000400
-#define ASCCON_EMMASK		0x00001800
-#define ASCCON_EMOFFSET		11
-#define ASCCON_EM_ECHO_OFF	0x0
-#define ASCCON_EM_ECHO_AB	0x1
-#define ASCCON_EM_ECHO_ON	0x2
-#define ASCCON_LB		0x00002000
-#define ASCCON_ACO 		0x00004000
-#define ASCCON_R		0x00008000
-#define ASCCON_PAL		0x00010000
-#define ASCCON_FEN		0x00020000
-#define ASCCON_RUEN		0x00040000
-#define ASCCON_ROEN		0x00080000
-#define ASCCON_TOEN		0x00100000
-#define ASCCON_BEN		0x00200000
-#define ASCCON_TXINV		0x01000000
-#define ASCCON_RXINV		0x02000000
-#define ASCCON_TXMSB		0x04000000
-#define ASCCON_RXMSB		0x08000000
-
-/* STATE register's bits and bitfields */
-#define ASCSTATE_REN		0x00000001
-#define ASCSTATE_PE		0x00010000
-#define ASCSTATE_FE		0x00020000
-#define ASCSTATE_RUE		0x00040000
-#define ASCSTATE_ROE		0x00080000
-#define ASCSTATE_TOE		0x00100000
-#define ASCSTATE_BE		0x00200000
-#define ASCSTATE_TXBVMASK	0x07000000
-#define ASCSTATE_TXBVOFFSET	24
-#define ASCSTATE_TXEOM		0x08000000
-#define ASCSTATE_RXBVMASK	0x70000000
-#define ASCSTATE_RXBVOFFSET	28
-#define ASCSTATE_RXEOM		0x80000000
-
-/* WHBSTATE register's bits and bitfields */
-#define ASCWHBSTATE_CLRREN	0x00000001
-#define ASCWHBSTATE_SETREN	0x00000002
-#define ASCWHBSTATE_CLRPE	0x00000004
-#define ASCWHBSTATE_CLRFE	0x00000008
-#define ASCWHBSTATE_CLRRUE	0x00000010
-#define ASCWHBSTATE_CLRROE	0x00000020
-#define ASCWHBSTATE_CLRTOE	0x00000040
-#define ASCWHBSTATE_CLRBE	0x00000080
-#define ASCWHBSTATE_SETPE	0x00000100
-#define ASCWHBSTATE_SETFE	0x00000200
-#define ASCWHBSTATE_SETRUE	0x00000400
-#define ASCWHBSTATE_SETROE	0x00000800
-#define ASCWHBSTATE_SETTOE	0x00001000
-#define ASCWHBSTATE_SETBE	0x00002000
-
-/* ABCON register's bits and bitfields */
-#define ASCABCON_ABEN		0x0001
-#define ASCABCON_AUREN		0x0002
-#define ASCABCON_ABSTEN		0x0004
-#define ASCABCON_ABDETEN	0x0008
-#define ASCABCON_FCDETEN	0x0010
-
-/* FDV register mask, offset and bitfields*/
-#define ASCFDV_VALUE_MASK	0x000001FF
-
-/* WHBABCON register's bits and bitfields */
-#define ASCWHBABCON_CLRABEN	0x0001
-#define ASCWHBABCON_SETABEN	0x0002
-
-/* ABSTAT register's bits and bitfields */
-#define ASCABSTAT_FCSDET	0x0001
-#define ASCABSTAT_FCCDET	0x0002
-#define ASCABSTAT_SCSDET	0x0004
-#define ASCABSTAT_SCCDET	0x0008
-#define ASCABSTAT_DETWAIT	0x0010
-
-/* WHBABSTAT register's bits and bitfields */
-#define ASCWHBABSTAT_CLRFCSDET	0x0001
-#define ASCWHBABSTAT_SETFCSDET	0x0002
-#define ASCWHBABSTAT_CLRFCCDET	0x0004
-#define ASCWHBABSTAT_SETFCCDET	0x0008
-#define ASCWHBABSTAT_CLRSCSDET	0x0010
-#define ASCWHBABSTAT_SETSCSDET	0x0020
-#define ASCWHBABSTAT_CLRSCCDET	0x0040
-#define ASCWHBABSTAT_SETSCCDET	0x0080
-#define ASCWHBABSTAT_CLRDETWAIT	0x0100
-#define ASCWHBABSTAT_SETDETWAIT	0x0200
-
-/* TXFCON register's bits and bitfields */
-#define ASCTXFCON_TXFIFO1       0x00000400
-#define ASCTXFCON_TXFEN         0x0001
-#define ASCTXFCON_TXFFLU        0x0002
-#define ASCTXFCON_TXFITLMASK    0x3F00
-#define ASCTXFCON_TXFITLOFF     8
-
-/* RXFCON register's bits and bitfields */
-#define ASCRXFCON_RXFIFO1       0x00000400
-#define ASCRXFCON_RXFEN         0x0001
-#define ASCRXFCON_RXFFLU        0x0002
-#define ASCRXFCON_RXFITLMASK    0x3F00
-#define ASCRXFCON_RXFITLOFF     8
-
-/* FSTAT register's bits and bitfields */
-#define ASCFSTAT_RXFFLMASK      0x003F
-#define ASCFSTAT_TXFFLMASK      0x3F00
-#define ASCFSTAT_TXFFLOFF       8
-
-typedef struct IfxAsc_s
-{
-	unsigned long  asc_clc;                            /*0x0000*/
-	unsigned long  asc_pisel;                          /*0x0004*/
-	unsigned long  asc_id;                             /*0x0008*/
-	unsigned long  asc_rsvd1[1];   /* for mapping */   /*0x000C*/
-	unsigned long  asc_con;                            /*0x0010*/
-	unsigned long  asc_state;                          /*0x0014*/
-	unsigned long  asc_whbstate;                       /*0x0018*/
-	unsigned long  asc_rsvd2[1];   /* for mapping */   /*0x001C*/
-	unsigned long  asc_tbuf;                           /*0x0020*/
-	unsigned long  asc_rbuf;                           /*0x0024*/
-	unsigned long  asc_rsvd3[2];   /* for mapping */   /*0x0028*/
-	unsigned long  asc_abcon;                          /*0x0030*/
-	unsigned long  asc_abstat;     /* not used */      /*0x0034*/
-	unsigned long  asc_whbabcon;                       /*0x0038*/
-	unsigned long  asc_whbabstat;  /* not used */      /*0x003C*/
-	unsigned long  asc_rxfcon;                         /*0x0040*/
-	unsigned long  asc_txfcon;                         /*0x0044*/
-	unsigned long  asc_fstat;                          /*0x0048*/
-	unsigned long  asc_rsvd4[1];   /* for mapping */   /*0x004C*/
-	unsigned long  asc_bg;                             /*0x0050*/
-	unsigned long  asc_bg_timer;                       /*0x0054*/
-	unsigned long  asc_fdv;                            /*0x0058*/
-	unsigned long  asc_pmw;                            /*0x005C*/
-	unsigned long  asc_modcon;                         /*0x0060*/
-	unsigned long  asc_modstat;                        /*0x0064*/
-	unsigned long  asc_rsvd5[2];   /* for mapping */   /*0x0068*/
-	unsigned long  asc_sfcc;                           /*0x0070*/
-	unsigned long  asc_rsvd6[3];   /* for mapping */   /*0x0074*/
-	unsigned long  asc_eomcon;                         /*0x0080*/
-	unsigned long  asc_rsvd7[26];   /* for mapping */  /*0x0084*/
-	unsigned long  asc_dmacon;                         /*0x00EC*/
-	unsigned long  asc_rsvd8[1];   /* for mapping */   /*0x00F0*/
-	unsigned long  asc_irnen;                          /*0x00F4*/
-	unsigned long  asc_irnicr;                         /*0x00F8*/
-	unsigned long  asc_irncr;                          /*0x00FC*/
-} IfxAsc_t;
-
-
-/* Register access macros */
-#define asc_readl(reg)				\
-	readl(&pAsc->reg)
-#define asc_writel(reg,value)			\
-	writel((value), &pAsc->reg)
-
-
-#endif /* __ASC_H */