move a few unmaintained packages from trunk to /packages

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33634 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 0 insertions, 153 deletions

diff --git a/package/madwifi/patches/400-new_hal.patch b/package/madwifi/patches/400-new_hal.patch
deleted file mode 100644
index 12a59687b..000000000
--- a/package/madwifi/patches/400-new_hal.patch
+++ /dev/null
@@ -1,153 +0,0 @@
---- a/ath/if_ath.c
-+++ b/ath/if_ath.c
-@@ -606,6 +606,14 @@ ath_attach(u_int16_t devid, struct net_d
- 	}
- 	sc->sc_ah = ah;
- 
-+	/* WAR for AR7100 PCI bug */
-+#if defined(CONFIG_ATHEROS_AR71XX) || defined(CONFIG_ATH79)
-+	if ((ar_device(sc->devid) >= 5210) && (ar_device(sc->devid) < 5416)) {
-+		ath_hal_setcapability(ah, HAL_CAP_DMABURST_RX, 0, HAL_DMABURST_4B, NULL);
-+		ath_hal_setcapability(ah, HAL_CAP_DMABURST_TX, 0, HAL_DMABURST_4B, NULL);
-+	}
-+#endif
-+
- 	/*
- 	 * Check if the MAC has multi-rate retry support.
- 	 * We do this by trying to setup a fake extended
-@@ -7568,7 +7576,7 @@ ath_txq_setup(struct ath_softc *sc, int
- 	if (qtype == HAL_TX_QUEUE_UAPSD)
- 		qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
- 	else
--		qi.tqi_qflags = HAL_TXQ_TXEOLINT_ENABLE | 
-+		qi.tqi_qflags = HAL_TXQ_TXEOLINT_ENABLE | HAL_TXQ_TXOKINT_ENABLE |
- 			HAL_TXQ_TXDESCINT_ENABLE;
- 	qnum = ath_hal_setuptxqueue(ah, qtype, &qi);
- 	if (qnum == -1) {
---- a/ath_hal/ah_os.c
-+++ b/ath_hal/ah_os.c
-@@ -126,6 +126,13 @@ ath_hal_printf(struct ath_hal *ah, const
- }
- EXPORT_SYMBOL(ath_hal_printf);
- 
-+void __ahdecl
-+ath_hal_printstr(struct ath_hal *ah, const char *str)
-+{
-+	printk("%s", str);
-+}
-+EXPORT_SYMBOL(ath_hal_printstr);
-+
- /*
-  * Format an Ethernet MAC for printing.
-  */
---- a/ath_hal/ah_os.h
-+++ b/ath_hal/ah_os.h
-@@ -156,69 +156,23 @@ extern u_int32_t __ahdecl ath_hal_getupt
- #endif
- #endif				/* AH_BYTE_ORDER */
- 
--/*
-- * Some big-endian architectures don't set CONFIG_GENERIC_IOMAP, but fail to
-- * implement iowrite32be and ioread32be.  Provide compatibility macros when
-- * it's needed.
-- *
-- * As of Linux 2.6.24, only MIPS, PARISC and PowerPC implement iowrite32be and
-- * ioread32be as functions.
-- *
-- * The downside or the replacement macros it that we may be byte-swapping data
-- * for the second time, so the native implementations should be preferred.
-- */
--#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) && \
--	!defined(CONFIG_GENERIC_IOMAP) && (AH_BYTE_ORDER == AH_BIG_ENDIAN) && \
--	!defined(__mips__) && !defined(__hppa__) && !defined(__powerpc__)
--# ifndef iowrite32be
--#  define iowrite32be(_val, _addr) iowrite32(swab32((_val)), (_addr))
--# endif
--# ifndef ioread32be
--#  define ioread32be(_addr) swab32(ioread32((_addr)))
--# endif
--#endif
-+#define IS_SWAPPED(_ah, _reg) \
-+	((_ah)->ah_swapped && \
-+		(((0x4000 <= (_reg)) && ((_reg) < 0x5000)) || \
-+		 ((0x7000 <= (_reg)) && ((_reg) < 0x8000))))
-+
-+#define SWAPREG(_ah, _reg, _val) \
-+	(IS_SWAPPED(_ah, _reg) ? cpu_to_le32(_val) : (_val))
- 
- /*
-  * The register accesses are done using target-specific functions when
-  * debugging is enabled (AH_DEBUG) or it's explicitly requested for the target.
-- *
-- * The hardware registers use little-endian byte order natively.  Big-endian
-- * systems are configured by HAL to enable hardware byte-swap of register reads
-- * and writes at reset.  This avoid the need to byte-swap the data in software.
-- * However, the registers in a certain area from 0x4000 to 0x4fff (PCI clock
-- * domain registers) are not byte swapped!
-- *
-- * Since Linux I/O primitives default to little-endian operations, we only
-- * need to suppress byte-swapping on big-endian systems outside the area used
-- * by the PCI clock domain registers.
-  */
--#if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
--#define is_reg_le(__reg) ((0x4000 <= (__reg) && (__reg) < 0x5000))
--#else
--#define is_reg_le(__reg) 1
--#endif
--
--#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
--#define _OS_REG_WRITE(_ah, _reg, _val) do {			\
--	 is_reg_le(_reg) ?					\
--	 iowrite32((_val), (_ah)->ah_sh + (_reg)) :		\
--	 iowrite32be((_val), (_ah)->ah_sh + (_reg));		\
--	} while (0)
--#define _OS_REG_READ(_ah, _reg)					\
--	(is_reg_le(_reg) ?					\
--	 ioread32((_ah)->ah_sh + (_reg)) :			\
--	 ioread32be((_ah)->ah_sh + (_reg)))
--#else
- #define _OS_REG_WRITE(_ah, _reg, _val) do {			\
--	 writel(is_reg_le(_reg) ? 				\
--	 	(_val) : cpu_to_le32(_val), 			\
--		(_ah)->ah_sh + (_reg));				\
--	} while (0)
-+	 __raw_writel(SWAPREG(_ah, _reg, _val), (_ah)->ah_sh + (_reg));		\
-+} while (0)
- #define _OS_REG_READ(_ah, _reg)					\
--	(is_reg_le(_reg) ?					\
--	 readl((_ah)->ah_sh + (_reg)) :				\
--	 cpu_to_le32(readl((_ah)->ah_sh + (_reg))))
--#endif				/* KERNEL_VERSION(2,6,12) */
-+	 SWAPREG(_ah, _reg, __raw_readl((_ah)->ah_sh + (_reg)))
- 
- /*
-  * The functions in this section are not intended to be invoked by MadWifi
---- a/ath/if_ath_hal.h
-+++ b/ath/if_ath_hal.h
-@@ -778,17 +778,6 @@ static inline HAL_STATUS ath_hal_getcapa
- 	return ret;
- }
- 
--static inline HAL_BOOL ath_hal_radar_wait(struct ath_hal *ah, HAL_CHANNEL *a1)
--{
--	HAL_BOOL ret;
--	ATH_HAL_LOCK_IRQ(ah->ah_sc);
--	ath_hal_set_function(__func__);
--	ret = ah->ah_radarWait(ah, a1);
--	ath_hal_set_function(NULL);
--	ATH_HAL_UNLOCK_IRQ(ah->ah_sc);
--	return ret;
--}
--
- static inline HAL_BOOL ath_hal_setmcastfilterindex(struct ath_hal *ah,
- 						   u_int32_t index)
- {
-@@ -1268,8 +1257,6 @@ static inline void ath_hal_dump_map(stru
- 	/* HAL_STATUS ah_getCapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE a1, u_int32_t capability, u_int32_t *result) */
- 	__print_symbol("%s=ah_getCapability\n",
- 		       (unsigned long)ah->ah_getCapability);
--	/* HAL_BOOL ah_radarWait(struct ath_hal *ah, HAL_CHANNEL *a1) */
--	__print_symbol("%s=ah_radarWait\n", (unsigned long)ah->ah_radarWait);
- 	/* HAL_BOOL ah_setMulticastFilterIndex(struct ath_hal *ah, u_int32_t index) */
- 	__print_symbol("%s=ah_setMulticastFilterIndex\n",
- 		       (unsigned long)ah->ah_setMulticastFilterIndex);