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authorblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-07-24 20:37:50 +0000
committerblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-07-24 20:37:50 +0000
commitea6e386f6f5bbad234c1ec138ba71e01b23ff77e (patch)
tree0c5f16afaac5b361c18502777986bb81167f234e /docs
parentfe61983ee0c32dccd5343176d38845a694f320c3 (diff)
[ramips] uart_clk on Rt3352F is always 40MHz
Currently, sys_clk/10 is used which is just wrong. cpu_clk/10 would work for systems with 400MHz CPU clock. Signed-off-by: Daniel Golle <dgolle@allnet.de> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32812 3c298f89-4303-0410-b956-a3cf2f4a3e73
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