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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2013-04-07 13:25:38 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2013-04-07 13:25:38 +0000
commite1d9cfc6569e7ab436177c0ae3e97fbed884178d (patch)
treeb61dc77d76cf3ab78e0bd7aad85f28e9d75df8f9
parent42a01d59f6b0859d0358192d74ba7844c751d2bc (diff)
ramips: handle PCI interrupts in plat_irq_dispatch
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36245 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/ramips/patches-3.8/0122-MIPS-ralink-handle-PCI-interrupts-as-well.patch30
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.8/0122-MIPS-ralink-handle-PCI-interrupts-as-well.patch b/target/linux/ramips/patches-3.8/0122-MIPS-ralink-handle-PCI-interrupts-as-well.patch
new file mode 100644
index 000000000..b898a0a53
--- /dev/null
+++ b/target/linux/ramips/patches-3.8/0122-MIPS-ralink-handle-PCI-interrupts-as-well.patch
@@ -0,0 +1,30 @@
+From e0fbc01d33265d32fe7f5f34269cb88be2a13c24 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Sun, 31 Mar 2013 10:17:26 +0200
+Subject: [PATCH] MIPS: ralink: handle PCI interrupts as well
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ arch/mips/ralink/irq.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/ralink/irq.c
++++ b/arch/mips/ralink/irq.c
+@@ -31,6 +31,7 @@
+ #define INTC_INT_GLOBAL BIT(31)
+
+ #define RALINK_CPU_IRQ_INTC (MIPS_CPU_IRQ_BASE + 2)
++#define RALINK_CPU_IRQ_PCI (MIPS_CPU_IRQ_BASE + 4)
+ #define RALINK_CPU_IRQ_FE (MIPS_CPU_IRQ_BASE + 5)
+ #define RALINK_CPU_IRQ_WIFI (MIPS_CPU_IRQ_BASE + 6)
+ #define RALINK_CPU_IRQ_COUNTER (MIPS_CPU_IRQ_BASE + 7)
+@@ -104,6 +105,9 @@ asmlinkage void plat_irq_dispatch(void)
+ else if (pending & STATUSF_IP6)
+ do_IRQ(RALINK_CPU_IRQ_WIFI);
+
++ else if (pending & STATUSF_IP4)
++ do_IRQ(RALINK_CPU_IRQ_PCI);
++
+ else if (pending & STATUSF_IP2)
+ do_IRQ(RALINK_CPU_IRQ_INTC);
+