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authorflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>2009-06-26 11:08:12 +0000
committerflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>2009-06-26 11:08:12 +0000
commitb0b6441b420db1b255388cb3a0c7705b1231da9d (patch)
treee487639b04f18ad59879c3e18ec885c973b23b72
parent86f48601fef735573bce518c3a07858fc93c18f3 (diff)
[brcm63xx] define bcm6338 SDRAM base register and make sure that the right CPU id will be used to detect a bcm6338
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16567 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c3
-rw-r--r--target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h6
2 files changed, 7 insertions, 2 deletions
diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
index bc7ed50f8..f94a5c2a0 100644
--- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
+++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
@@ -40,6 +40,7 @@ static const unsigned long bcm96338_regs_base[] = {
[RSET_UDC0] = BCM_6338_UDC0_BASE,
[RSET_UART0] = BCM_6338_UART0_BASE,
[RSET_GPIO] = BCM_6338_GPIO_BASE,
+ [RSET_SDRAM] = BCM_6338_SDRAM_BASE,
[RSET_SPI] = BCM_6338_SPI_BASE,
[RSET_MEMC] = BCM_6338_MEMC_BASE,
};
@@ -310,7 +311,7 @@ void __init bcm63xx_cpu_init(void)
expected_cpu_id = 0;
switch (c->cputype) {
- case CPU_BCM6338:
+ case CPU_BCM3302:
expected_cpu_id = BCM6338_CPU_ID;
bcm63xx_regs_base = bcm96338_regs_base;
bcm63xx_irqs = bcm96338_irqs;
diff --git a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
index 2ad2c9dc9..1819dc1b2 100644
--- a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
+++ b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
@@ -134,7 +134,9 @@ enum bcm63xx_regs_set {
#define BCM_6338_USBDMA_BASE (0xfffe2400)
#define BCM_6338_ENET0_BASE (0xfffe2800)
#define BCM_6338_UDC0_BASE (0xfffe3000) /* USB_CTL_BASE */
-#define BCM_6338_MEMC_BASE (0xfffe3100)
+#define BCM_6338_SDRAM_REGS_BASE (0xfffe3100)
+#define BCM_6338_SDRAM_BASE (0xfffe3100)
+#define BCM_6338_MEMC_BASE (0xdeadbeef)
/*
* 6345 register sets base address
@@ -225,6 +227,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
return BCM_6338_SPI_BASE;
case RSET_MEMC:
return BCM_6338_MEMC_BASE;
+ case RSET_SDRAM:
+ return BCM_6338_SDRAM_BASE;
}
#endif
#ifdef CONFIG_BCM63XX_CPU_6345