diff options
| author | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-12-06 22:40:26 +0000 |
|---|---|---|
| committer | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-12-06 22:40:26 +0000 |
| commit | 905be8bf46d188b6369d48ccdd3f6a18b84506b8 (patch) | |
| tree | 6b5540f6f505892af754d78f7cc6cad5d0b20a8b | |
| parent | dafb6fcc83cdf1e13b58b1f6882c4a9286f76ef2 (diff) | |
[adm8668] move clock frequencies into clock driver
Signed-off-by: Florian Fainelli <florian@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34556 3c298f89-4303-0410-b956-a3cf2f4a3e73
| -rw-r--r-- | target/linux/adm8668/files/arch/mips/adm8668/clock.c | 4 | ||||
| -rw-r--r-- | target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h | 5 |
2 files changed, 2 insertions, 7 deletions
diff --git a/target/linux/adm8668/files/arch/mips/adm8668/clock.c b/target/linux/adm8668/files/arch/mips/adm8668/clock.c index 6c839a247..1e010fcc8 100644 --- a/target/linux/adm8668/files/arch/mips/adm8668/clock.c +++ b/target/linux/adm8668/files/arch/mips/adm8668/clock.c @@ -19,7 +19,7 @@ struct clk { }; static struct clk uart_clk = { - .rate = ADM8668_UARTCLK_FREQ, + .rate = 62500000, }; static struct clk sys_clk; @@ -70,7 +70,7 @@ void __init adm8668_init_clocks(void) * CR3 bit 14~11, 0000 -> 175MHz, 0001 -> 180MHz, etc... */ adj = (ADM8668_CONFIG_REG(ADM8668_CR3) >> 11) & 0xf; - sys_clk.rate = SYS_CLOCK + adj * 5000000; + sys_clk.rate = 175000000 + (adj * 5000000); pr_info("ADM8668 CPU clock: %lu MHz\n", sys_clk.rate / 1000000); } diff --git a/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h b/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h index f0608d155..f7b2c5e63 100644 --- a/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h +++ b/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h @@ -9,8 +9,6 @@ #ifndef __ADM8668_H__ #define __ADM8668_H__ -#define SYS_CLOCK 175000000 - /*======================= Physical Memory Map ============================*/ #define ADM8668_SDRAM_BASE 0 #define ADM8668_SMEM1_BASE 0x10000000 @@ -29,9 +27,6 @@ #define ADM8668_PCICFG_BASE 0x12200000 #define ADM8668_PCIDAT_BASE 0x12400000 -/** onboard uart **/ -#define ADM8668_UARTCLK_FREQ 62500000 - /* interrupt levels */ #define INT_LVL_SWI 1 #define INT_LVL_COMMS_RX 2 |