diff options
| author | hcg <hcg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-06-10 12:23:55 +0000 | 
|---|---|---|
| committer | hcg <hcg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-06-10 12:23:55 +0000 | 
| commit | 86996ff727bce6f64e073f48c41f48bcc076a700 (patch) | |
| tree | 99d8ef3b7c005f94b3aa308e7c365270823e01e4 | |
| parent | 3d975fbf42320b3c8ed9e982fdbe54d18447da04 (diff) | |
Remove deprecated 023-mips_delay_gcc4.4.0.patch and add new delay fix for MIPS
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16397 3c298f89-4303-0410-b956-a3cf2f4a3e73
| -rw-r--r-- | target/linux/generic-2.6/patches-2.6.30/023-mips_delay_gcc4.4.0.patch | 152 | ||||
| -rw-r--r-- | target/linux/generic-2.6/patches-2.6.30/024-mips_delay.patch | 32 | 
2 files changed, 32 insertions, 152 deletions
| diff --git a/target/linux/generic-2.6/patches-2.6.30/023-mips_delay_gcc4.4.0.patch b/target/linux/generic-2.6/patches-2.6.30/023-mips_delay_gcc4.4.0.patch deleted file mode 100644 index 619ee1721..000000000 --- a/target/linux/generic-2.6/patches-2.6.30/023-mips_delay_gcc4.4.0.patch +++ /dev/null @@ -1,152 +0,0 @@ -From: Wu Zhangjin <wuzj@lemote.com> - -the gcc 4.4 support for MIPS mostly refer to this PATCH: -http://www.nabble.com/-PATCH--MIPS:-Handle-removal-of-%27h%27-constraint-in-GCC-4.4-td22192768.html -but have been tuned a little. - -because only gcc 4.4 have loongson-specific support, so, we need to -choose the suitable -march argument for gcc <= 4.3 and gcc >= 4.4, and -we also need to consider use -march=loongson2e and -march=loongson2f for -loongson2e and loongson2f respectively. this is handled by adding two -new kernel options: CPU_LOONGSON2E and CPU_LOONGSON2F(thanks for the -solutin provided by ZhangLe). - -I have tested it on FuLoong(2f) in 32bit and 64bit with gcc-4.4 and -gcc-4.3. so, basically, it works. - -Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> ---- - arch/mips/Makefile               |    9 +++++- - arch/mips/include/asm/compiler.h |   10 ++++++ - arch/mips/include/asm/delay.h    |   58 +++++++++++++++++++++++++------------ - 3 files changed, 57 insertions(+), 20 deletions(-) - ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -120,7 +120,14 @@ cflags-$(CONFIG_CPU_R4300)	+= -march=r43 - cflags-$(CONFIG_CPU_VR41XX)	+= -march=r4100 -Wa,--trap - cflags-$(CONFIG_CPU_R4X00)	+= -march=r4600 -Wa,--trap - cflags-$(CONFIG_CPU_TX49XX)	+= -march=r4600 -Wa,--trap --cflags-$(CONFIG_CPU_LOONGSON2)	+= -march=r4600 -Wa,--trap -+ -+# only gcc >= 4.4 have the loongson-specific support -+cflags-$(CONFIG_CPU_LOONGSON2)	+= -Wa,--trap -+cflags-$(CONFIG_CPU_LOONGSON2E)	+= $(shell if [ $(call cc-version) -lt 0440 ] ; then \ -+	echo $(call cc-option,-march=r4600); else echo $(call cc-option,-march=loongson2e); fi ;) -+cflags-$(CONFIG_CPU_LOONGSON2F)	+= $(shell if [ $(call cc-version) -lt 0440 ] ; then \ -+	echo $(call cc-option,-march=r4600); else echo $(call cc-option,-march=loongson2f); fi ;) -+ - cflags-$(CONFIG_CPU_MIPS32_R1)	+= $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ - 			-Wa,-mips32 -Wa,--trap - cflags-$(CONFIG_CPU_MIPS32_R2)	+= $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ ---- a/arch/mips/include/asm/compiler.h -+++ b/arch/mips/include/asm/compiler.h -@@ -1,5 +1,6 @@ - /* -  * Copyright (C) 2004, 2007  Maciej W. Rozycki -+ * Copyright (C) 2009  Wu Zhangjin, wuzj@lemote.com -  * -  * This file is subject to the terms and conditions of the GNU General Public -  * License.  See the file "COPYING" in the main directory of this archive -@@ -16,4 +17,13 @@ - #define GCC_REG_ACCUM "accum" - #endif -  -+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4) -+#define GCC_NO_H_CONSTRAINT -+#ifdef CONFIG_64BIT -+typedef unsigned int uintx_t __attribute__((mode(TI))); -+#else -+typedef u64 uintx_t; -+#endif -+#endif -+ - #endif /* _ASM_COMPILER_H */ ---- a/arch/mips/include/asm/delay.h -+++ b/arch/mips/include/asm/delay.h -@@ -7,6 +7,7 @@ -  * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle -  * Copyright (C) 1999, 2000 Silicon Graphics, Inc. -  * Copyright (C) 2007  Maciej W. Rozycki -+ * Copyright (C) 2009  Wu Zhangjin, wuzj@lemote.com -  */ - #ifndef _ASM_DELAY_H - #define _ASM_DELAY_H -@@ -48,6 +49,43 @@ static inline void __delay(unsigned long - 		: "0" (loops), "r" (1)); - } -  -+/* -+ * convert usecs to loops -+ * -+ * handle removal of 'h' constraint in GCC 4.4 -+ */ -+ -+#ifndef GCC_NO_H_CONSTRAINT	/* gcc <= 4.3 */ -+static inline unsigned long __usecs_to_loops(unsigned long usecs, -+		unsigned long lpj) -+{ -+	unsigned long hi, lo; -+ -+	if (sizeof(long) == 4) -+		__asm__("multu\t%2, %3" -+		: "=h" (usecs), "=l" (lo) -+		: "r" (usecs), "r" (lpj) -+		: GCC_REG_ACCUM); -+	else if (sizeof(long) == 8 && !R4000_WAR) -+		__asm__("dmultu\t%2, %3" -+		: "=h" (usecs), "=l" (lo) -+		: "r" (usecs), "r" (lpj) -+		: GCC_REG_ACCUM); -+	else if (sizeof(long) == 8 && R4000_WAR) -+		__asm__("dmultu\t%3, %4\n\tmfhi\t%0" -+		: "=r" (usecs), "=h" (hi), "=l" (lo) -+		: "r" (usecs), "r" (lpj) -+		: GCC_REG_ACCUM); -+ -+	return usecs; -+} -+#else	/* GCC_NO_H_CONSTRAINT, gcc >= 4.4 */ -+static inline unsigned long __usecs_to_loops(unsigned long usecs, -+		unsigned long lpj) -+{ -+	return ((uintx_t)usecs * lpj) >> BITS_PER_LONG; -+} -+#endif -  - /* -  * Division by multiplication: you don't have to worry about -@@ -62,8 +100,6 @@ static inline void __delay(unsigned long -  - static inline void __udelay(unsigned long usecs, unsigned long lpj) - { --	unsigned long hi, lo; -- - 	/* - 	 * The rates of 128 is rounded wrongly by the catchall case - 	 * for 64-bit.  Excessive precission?  Probably ... -@@ -77,23 +113,7 @@ static inline void __udelay(unsigned lon - 	                           0x80000000ULL) >> 32); - #endif -  --	if (sizeof(long) == 4) --		__asm__("multu\t%2, %3" --		: "=h" (usecs), "=l" (lo) --		: "r" (usecs), "r" (lpj) --		: GCC_REG_ACCUM); --	else if (sizeof(long) == 8 && !R4000_WAR) --		__asm__("dmultu\t%2, %3" --		: "=h" (usecs), "=l" (lo) --		: "r" (usecs), "r" (lpj) --		: GCC_REG_ACCUM); --	else if (sizeof(long) == 8 && R4000_WAR) --		__asm__("dmultu\t%3, %4\n\tmfhi\t%0" --		: "=r" (usecs), "=h" (hi), "=l" (lo) --		: "r" (usecs), "r" (lpj) --		: GCC_REG_ACCUM); -- --	__delay(usecs); -+	__delay(__usecs_to_loops(usecs, lpj)); - } -  - #define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val diff --git a/target/linux/generic-2.6/patches-2.6.30/024-mips_delay.patch b/target/linux/generic-2.6/patches-2.6.30/024-mips_delay.patch new file mode 100644 index 000000000..284f34610 --- /dev/null +++ b/target/linux/generic-2.6/patches-2.6.30/024-mips_delay.patch @@ -0,0 +1,32 @@ +From: Atsushi Nemoto <nemoto@toshiba-tops.co.jp> +Subject: [PATCH] fix __ndelay build error and add 'ull' suffix for 32-bit kernel + +Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> +--- + arch/mips/lib/delay.c |    4 ++-- + 1 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c +index f69c6b5..6b3b1de 100644 +--- a/arch/mips/lib/delay.c ++++ b/arch/mips/lib/delay.c +@@ -43,7 +43,7 @@ void __udelay(unsigned long us) + { +        unsigned int lpj = current_cpu_data.udelay_val; +  +-       __delay((us * 0x000010c7 * HZ * lpj) >> 32); ++       __delay((us * 0x000010c7ull * HZ * lpj) >> 32); + } + EXPORT_SYMBOL(__udelay); +  +@@ -51,6 +51,6 @@ void __ndelay(unsigned long ns) + { +        unsigned int lpj = current_cpu_data.udelay_val; +  +-       __delay((us * 0x00000005 * HZ * lpj) >> 32); ++       __delay((ns * 0x00000005ull * HZ * lpj) >> 32); + } + EXPORT_SYMBOL(__ndelay); + + + | 
