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author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-03-13 17:29:31 +0000 |
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committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-03-13 17:29:31 +0000 |
commit | 4501ad5f3b0ec4c58cb72cbdad273554b585c7ff (patch) | |
tree | e1b21217f173c755da6254499c89ca1095cb3eea | |
parent | 2564046cdc2aed8924c0e2da3787212d7ac820e6 (diff) |
ar71xx: fix a typo in ar71xx_regs.h
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30921 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r-- | target/linux/ar71xx/patches-3.2/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h | 11 | ||||
-rw-r--r-- | target/linux/ar71xx/patches-3.3/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h | 11 |
2 files changed, 22 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.2/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h b/target/linux/ar71xx/patches-3.2/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h new file mode 100644 index 000000000..9069edd4d --- /dev/null +++ b/target/linux/ar71xx/patches-3.2/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h @@ -0,0 +1,11 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -313,7 +313,7 @@ + #define AR934X_RESET_USB_PHY_ANALOG BIT(11) + #define AR934X_RESET_HOST_DMA_INT BIT(10) + #define AR934X_RESET_GE0_MAC BIT(9) +-#define AR934X_RESET_ETH_SIWTCH BIT(8) ++#define AR934X_RESET_ETH_SWITCH BIT(8) + #define AR934X_RESET_PCIE_PHY BIT(7) + #define AR934X_RESET_PCIE BIT(6) + #define AR934X_RESET_USB_HOST BIT(5) diff --git a/target/linux/ar71xx/patches-3.3/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h b/target/linux/ar71xx/patches-3.3/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h new file mode 100644 index 000000000..9069edd4d --- /dev/null +++ b/target/linux/ar71xx/patches-3.3/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h @@ -0,0 +1,11 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -313,7 +313,7 @@ + #define AR934X_RESET_USB_PHY_ANALOG BIT(11) + #define AR934X_RESET_HOST_DMA_INT BIT(10) + #define AR934X_RESET_GE0_MAC BIT(9) +-#define AR934X_RESET_ETH_SIWTCH BIT(8) ++#define AR934X_RESET_ETH_SWITCH BIT(8) + #define AR934X_RESET_PCIE_PHY BIT(7) + #define AR934X_RESET_PCIE BIT(6) + #define AR934X_RESET_USB_HOST BIT(5) |